Abstract: A stress film forming method is used in a fabrication process of a semiconductor device. Firstly, a substrate is provided, wherein a first-polarity-channel MOSFET and a second-polarity-channel MOSFET are formed on the substrate. Then, at least one deposition-curing cycle process is performed to form a cured stress film over the first-polarity-channel MOSFET and the second-polarity-channel MOSFET. Afterwards, an additional deposition process is performed form a non-cured stress film on the cured stress film, wherein the cured stress film and the non-cured stress film are collectively formed as a seamless stress film.

Abstract: A semiconductor device including a substrate, a first device, a second device and an interlayer dielectric layer is provided. The substrate has a first area and a second area. The first device is disposed in the first area of the substrate and includes a first dielectric layer on the substrate and a metal gate on the first dielectric layer. The second device is in the second area of the substrate and includes a second dielectric layer on the substrate and, a polysilicon layer on the second dielectric layer. It is noted that the height of the polysilicon layer is less than that of the metal gate of the first device. The interlayer dielectric layer covers the second device.

Abstract: A diaphragm of an MEMS electroacoustic transducer including a first axis-symmetrical pattern layer is provided. Because the layout of the first axis-symmetrical pattern layer can match the pattern of the sound wave, the vibration uniformity of the diaphragm can be improved.

Abstract: A method for fabricating a semiconductor device includes steps as following. First, a substrate with an edge-mark is provided. The substrate has a front-side surface and a back-side surface opposite to each other. The front-side surface has an active region and a peripheral region with an alignment mark formed thereon. Next, an optical shielding layer is formed over the back-side surface of the substrate. Next, a first photo mask is aligned to the substrate by standing on the edge-mark. Next, a portion of the optical shielding layer corresponding with the alignment mark is removed by using the first photo mask. Next, a second photo mask is aligned to the substrate by standing on the alignment mark. Then, a portion of the optical shielding layer corresponding with the active region is removed to expose a portion of the substrate by using the second photo mask for forming an optical shielding pattern.

Abstract: A method optical proximity correction includes the following steps. First, a layout of an integrated circuit with an exposure intensity specification is provided. The integrated circuit includes a plurality of patterns and each pattern has an exposure intensity distribution. Second, a quadratic polynomial equation of each exposure intensity distribution is approximated. Third, a local extreme intensity of each exposure intensity distribution is computed by fitting the quadratic polynomial equation. Fourth, the local extreme intensity is determined whether violating the exposure intensity specification or not. Then, the layout is corrected when the local extreme intensity violates the exposure intensity specification.

Abstract: A semiconductor chip package structure including a first semiconductor chip, a second semiconductor chip and a supporting substrate is provided. The first semiconductor chip includes at least a first conductor unit. The first conductor unit has a first bonding surface and a second bonding surface exposed from the first semiconductor chip. The second semiconductor chip includes at least a second conductor unit. The second conductor unit has a third bonding surface and a fourth bonding surface exposed from the second semiconductor chip. The third bonding surface is contacted with and electrically connected to the first bonding surface. The supporting substrate includes a wire unit for electrically connecting to at least one of the second bonding surface and the fourth bonding surface. A semiconductor chip and a semiconductor chip group are also provided.

Abstract: An exemplary method of etching sacrificial layer includes steps of: providing a substrate formed with a sacrificial layer and defined with a first region and a second region, the sacrificial layer disposed in both the first and second regions; forming a hard mask covering the first region while exposing the second region; performing a first etching process on the sacrificial layer to thin the sacrificial layer while forming a byproduct film overlying the thinned sacrificial layer; performing a second etching process on the byproduct film to remove a portion of the byproduct layer for exposing a portion of the thinned sacrificial layer, while another portion of the byproduct film disposed on sidewalls of the thinned sacrificial layer being remained; and performing a third etching process on the thinned sacrificial layer, to remove the portion of the thinned sacrificial layer exposed in the second etching process.

Abstract: A light emitting diode and its fabricating method are disclosed. A light emitting diode epitaxy structure is formed on a substrate, and then the light emitting diode epitaxy structure is etched to form a recess. The recess is then filled with a transparent dielectric material. An adhesive layer is utilized to adhere a conductive substrate and the light emitting diode epitaxy structure. Next, the substrate is removed.

Abstract: A method for fabricating a semiconductor device is described. A polysilicon layer is formed on a substrate. The polysilicon layer is doped with an N-type dopant. A portion of the polysilicon layer is then removed to form a plurality of dummy patterns. Each dummy pattern has a top, a bottom, and a neck arranged between the top and the bottom, where the width of the neck is narrower than that of the top. A dielectric layer is formed on the substrate to cover the substrate disposed between adjacent dummy patterns, and the top of each dummy pattern is exposed. Thereafter, the dummy patterns are removed to form a plurality of trenches in the dielectric layer. A plurality of gate structures is formed in the trenches, respectively.

Abstract: An optical proximity correction process for designing a mask according to a target exposure intensity of each edge of a pattern is provided. Each edge is at a corresponding current edge position which corresponds to a current exposure intensity. The process comprises repeating a convergence process on each edge to determine an adjusted position for the edge until an adjusted exposure intensity of the edge is equal to the target exposure intensity. For each edge, the convergence process comprises comparing the target exposure intensity with the current exposure intensity to determine an in-position correlating to a first exposure intensity and an out-position correlating to a second exposure intensity, wherein the target exposure intensity is within a range between the first and the second exposure intensities. An interpolation is performed to obtain the adjusted position according to the target exposure intensity. The pattern is updated according to the adjusted position.

Abstract: A method of cleaning a turbo pump is described. The turbo pump is coupled with a CVD chamber of depositing a material and thus accumulates the material therein. The method includes switching off the turbo pump and using another pump to pump a reactive gas, which can react with the material to form gaseous products, through the turbo pump. Thereby, the turbo pump is cleaned up and is prevented from being a particle source in subsequent CVD operations.

Abstract: A microelectromechanical system diaphragm is provided. The microelectromechanical system diaphragm includes a substrate, a first conductive layer, a second conductive layer, a first dielectric layer, and a second dielectric layer. The first conductive layer is disposed on the substrate. The first conductive layer has a flexible portion in which a plurality of trenches is formed. The second conductive layer is disposed between the first conductive layer and the substrate, in which the flexible portion is located above the second conductive layer. The first dielectric layer is disposed between the second conductive layer and the substrate. The second dielectric layer is disposed between the substrate and a portion of the first conductive layer so as to suspend the flexible portion. Furthermore, at least one first opening is formed in the first conductive layer.

Abstract: A test key for checking an interconnect structure is described, including a contiguous metal line and multiple conductive plugs on the contiguous metal line, wherein one end of each plug contacts with the contiguous metal line. The other end of at least one plug is not connected to any conductor. In addition, the two ends of the contiguous metal line are connected to different voltages.

Abstract: A backside illuminated (BSI) image sensor including a substrate, a plurality of photosensitive regions, a back-end-of-line (BEOL), a pad, a color filter array, a plurality of micro-lenses and a protection layer is provided. The substrate has a first surface and a second surface. The substrate has a pad opening therein through the first surface and the second surface. The photosensitive regions are disposed in the substrate. The BEOL is disposed on the first surface of the substrate. The pad is disposed in the BEOL and exposed by the pad opening. The color filter array is disposed on the second surface of the substrate. The micro-lenses are disposed on the color filter array. The protection layer at least covers the top corner and the sidewall of the pad opening.

Abstract: A silicon dioxide film fabricating process includes the following steps. Firstly, a substrate is provided. A rapid thermal oxidation-in situ steam generation process is performed to form a silicon dioxide film on the substrate. An annealing process is performed to anneal the substrate in a first gas mixture at a temperature in the range of 1000° C. to 1100° C.

Abstract: A method for producing a mapping tool, a video game system for a stand-alone computer having the mapping tool and operation method thereof is disclosed. The mapping tool is created by means of linking a remote motion signal generated from a remote device which is operated by user with an input source signal from a conventional input source motion mapping table. User may operate the video game system for the stand-alone computer through the mapping tool. The present invention employs the mapping tool to replace conventional input source motion mapping table, thereby providing natural ergonomic and consistent usage of existing PC games or games for stand-alone computer having the input source motion mapping table.

Abstract: A method for providing auto focus for camera module that is electrically tunable using liquid crystal optical element is provided. The liquid crystal optical element includes substrate layers, insulating layer, three electrodes, liquid crystal layer between the substrate layers, and voltages applied between electrodes to control the optical power of the liquid crystal layer. The liquid crystal layer is coupled onto a camera module for provide auto focus on object located between 10 cm to infinity, achieving a response time at most of about 600 milliseconds. Tuning for the predetermined focal length is provided for liquid crystal optical element when object is located between 10 cm to infinity.