Abstract: A method for assembling semiconductor packages (10) includes forming corresponding pairs of conductive pads (14, 16, 20, 22) on respective surfaces of a die (12) and an interconnective substrate (18). Each pad in each pair includes an upper portion comprising at least one component of an electrically conductive eutectic alloy. Sharp, upstanding peaks (50, 58) are formed on at least one of the pads in each pair. The die and substrate are forcefully abutted and the pads heated until the sharp peaks penetrate through oxide films (52) on the respective opposing pads in each pair and contact the upper surface of the other pad therein, thereby initiating pad fusion. The pads are then cooled to solidify the molten portions thereof into an electrically conductive joint between each corresponding pair of pads and a hermetic seal around the periphery of the package.

Abstract: This invention provides a method for making a semiconductor package with stacked dies that substantially reduces risk of fracturing of the dies and prevents breakage of the wire bonds caused by wire sweep. One embodiment of the method includes the provision of a substrate and a pair of semiconductor dies, each having opposite top and bottom surfaces and a plurality of wire bonding pads around the peripheries of their respective top surfaces. One die is attached and wire bonded to a top surface of the substrate. A measured quantity of an uncured, fluid adhesive is dispensed onto the top surface of the first die, and the adhesive is squeezed out to the edges of the dies by pressing the bottom surface of the second die down onto the adhesive until the two dies are separated by a layer of the adhesive. The adhesive is cured and the second die is wire bonded to the substrate. A bead of an adhesive is dispensed around the periphery of the dies such that it covers the wire bonds and bonding pads on the second die.

Abstract: A method for making low cost chip size semiconductor packages (“CSPs”) includes preparing a substrate having a first surface with metal pads and lands thereon, and an opposite second surface having openings in it through which the lands are exposed. A solder mask is formed over the first surface of the substrate, and has apertures in it through which the metal pads are exposed. At least one vent opening is formed through the substrate and solder mask. A semiconductor die is electrically connected to the substrate through the apertures in the solder mask using the “flip chip” connection method. A body of an insulative plastic material is formed on the surface of the solder mask that simultaneously overmolds the die and underfills the space between the solder mask and the die in a single step. Solder balls are attached to the lands through the openings in the second surface of the substrate to serve as package input/output terminals.

Abstract: A low-cost printed circuit board for a semiconductor package having the footprint of a ball grid array package has an integral heat sink, or “slug,” for the mounting of one or more semiconductor chips, capable of efficiently conducting away at least five watts from the package in typical applications. It is made by forming an opening through a sheet, or substrate, of B-stage epoxy/fiberglass composite, or “pre-preg,” then inserting a slug of a thermally conductive material having the same size and shape as the opening into the opening. The slug-containing composite is sandwiched between two thin layers of a conductive metal, preferably copper, and the resulting sandwich is simultaneously pressed and heated between the platen of a heated press.

Abstract: A grid array assembly is provided employing a thin copper or steel carrier frame having apertures extending longitudinally of the frame. A series of semi-flexible substrate printed circuit boards are mounted in seriatim to peripheral edges of the apertures, the circuit boards including bonding pads and metallization on a first surface and conductive vias in the circuit boards extending to a second opposite surface containing a contact pad array. The carrier strip with the mounted circuit boards are passed to a station where an IC die is mounted on the board first surface, wire bonds are placed from the die to the bonding pads and the assembly encapsulated using a portion of the carrier strip as a mold gate to form a package body. Subsequently each grid array assembly is singulated from the carrier strip.

Abstract: In the manufacture of semiconductor packages having molded plastic bodies, the plating of all of the surfaces of the molding tool that comes into contact with the molten resin during molding with a nodular thin dense chromium (“NTDC”) coating prevents the surfaces from adhering to the package body and ensures good package release, without formation of cracks or craters in the package body. This, in turn, permits the amount of both release agents and adhesion promoters used in the molding compound to be substantially reduced, or eliminated altogether, thereby resulting in a package body having improved strength and adhesion with the components of the package, and hence, an improved resistance of the package body to the propagation of cracks and its subsequent penetration by moisture.

Abstract: A wafer-level method for mass production of surface-mounting, chip-size (“CS”) ball grid array (“BGA”), land grid array (“LGA”), and lead-less chip carrier (“LCC”) semiconductor packages includes the wire-bond or flip-chip attachment of ceramic substrates to the active surface of corresponding chips while they are still integral to a semiconductor wafer, thereby reducing manufacturing costs of the packages relative to that of individually packaged chips. The substrates have a thermal coefficient of expansion (TCE) closely matching that of the underlying chip.

Abstract: A PCB having oval solder ball lands, and a BGA semiconductor package produced using such a PCB, are disclosed. The PCB has a plurality of conductive traces forming circuit patterns on at least one of an upper and a lower surface of a resin substrate. A plurality of solder ball lands are formed on the lower surface of the substrate and are electrically connected to respective upper surface conductive traces. At least a portion of the solder ball lands have an oval shape and a major axis. The oval solder ball lands are oriented such that their major axes are either radially directed relative to a center of the substrate, perpendicularly directed relative to a side edge of the substrate, or both radially and perpendicularly directed relative the center and a side edge of the substrate, respectively.

Abstract: A carrier for use in testing an unpackaged semiconductor chip includes a body having a cavity for receiving the chip, inner contact elements and conductors for contacting connection pads on the chip and electrically connecting them to connection elements on an outside surface of the carrier, and rotatable clamps for holding the chip in the cavity. The carriers are configured to enable them to engage and mate with conventionally packaged chip test sockets, thereby enabling their use with conventional automated chip handling and testing equipment, and hence, the production of known good devices on a mass production basis.

Abstract: A cover for a computer mouse has a concavo-convex shell having a concave lower surface shaped to conform generally to the upper surface of a computer mouse and a front section that tapers forwardly and downwardly from a front end of the mouse to form a rounded nose. The shell has two apertures suggestive of eyes extending through it, each overlying a respective one of two finger-actuated buttons on the mouse, and though which, in one embodiment, the buttons on the mouse can be manipulated by the fingers of a user's hand. The shell further includes a pair of parallel, longitudinal depressions suggestive of ears formed on its upper surface. The depressions extend rearward from a corresponding one of the apertures, and are respectively adapted to receive the lower surface of a respective one of the user's fingers and align it with a respective one of the buttons.

Abstract: A printed circuit board for BGA semiconductor packages has structure for effectively grounding the PCB to a grounded mold during molding of the package, thus preventing any accumulation of electrostatic charge on the package, and hence, any damage to the semiconductor chips, bonding wires or conductive traces in the packages caused by a rapid discharge of such an accumulated charge. The grounding means may comprise a flat grounding pad, a raised grounding boss, and/or a plated-through, grounding tooling hole on the board. The grounding pad or boss is electrically connected to a ground via hole and/or a ground trace on the board, and is located outside of a package separation line formed on a surface of the PCB. The grounding tooling hole is internally plated with a conductive metal layer to make electrical contact with conductive tooling pins that extend between the molds.

Abstract: A reel-deployed printed circuit board for chip-on-board (COB) packages and a method for manufacturing COB packages using the reel printed circuit board are disclosed. The novel circuit board comprises an elongated, flexible base board and a plurality of unit boards defined within it by a plurality of slits cut through it. Each unit board comprises a plurality of bonding pads on its top surface, a plurality of contacts on its bottom surface, and a plurality of via holes that electrically connect the contacts to the bonding pads. The circuit board further comprises connection bars that connect the unit boards to the flexible base board. The method for manufacturing COB packages using the reel-deployed printed circuit board comprises the steps of forming the reel printed circuit board, attaching a semiconductor chip to it, connecting the semiconductor chip to the bonding pads, encapsulating the semiconductor chip, and separating the COB packages from the reel printed circuit board.

Abstract: An induction plasma source for integrated circuit fabrication includes an induction coil which defines a generally convex surface. The convex surface may be in the form of a spherical section less than a hemisphere, a paraboloid, or some other smooth convex surface. The windings of the induction coil may be spaced at different intervals in different sections of the coil and may be in multiple layers in at least a portion of the coil. Varying the shape of the coil and the distribution of the coil windings allows the plasma to be shaped in a desired manner.

Abstract: A method for forming a titanium silicide on a silicon wafer. The method includes the steps of removing native oxide film formed on the silicon wafer; depositing a titanium thin film on the silicon wafer using standard type (low power) sputtering method; quickly heat-treating the silicon wafer on which the titanium thin film is deposited so that diffusion occurs between the titanium thin film and the silicon wafer, thereby forming the titanium silicide, and removing the titanium thin film. A degas process before the titanium deposition is proposed also to remove impurities on the wafer.

Abstract: The invention discloses a method of making solder ball mounting pads on a substrate that have better ball shear performance, ball thermal cycle reliability, ball attach yield, and ball positional tolerances, than the solder ball mounting pads of the prior art. The method includes providing a sheet of material having a layer of metal thereon, and patterning the layer to define a solder ball mounting pad therein. The pad includes a central pad having at least two spokes radiating outward from it. An insulative mask is formed over the metal layer, and an opening is formed in the mask such that the central pad and an inner portion of each of the spokes is exposed therethrough, and an outer portion of each of the spokes is covered by the mask. In one embodiment, the central pad, spokes, and opening in the mask are shaped and arranged with respect to each other such that the pad and exposed portion of the spokes form a radially symmetrical pattern within the opening.

Abstract: A thin, small-outline semiconductor package, and a thermally enhanced leadframe for use in it, comprise a plurality of electrically conductive leads held together in a spaced, planar relationship about a central opening defined by the leads, and a thick, plate-like heat sink made of an electrically and thermally conductive metal attached to the leads such that it is centered within the opening and parallel to the plane of the leads. The heat sink has a lower surface exposed through the outer surface of a molded resin envelope encapsulating the package for the efficient dissipation of heat therefrom, and an upper surface having a recess formed into it. The recess has a planar floor with a semiconductor die attached to it, and defines a grounding ring around the periphery of the upper surface of the heat sink immediately adjacent to the edges of the die for the down-bonding of grounding wires from the die and the leads.

Abstract: An athletic shoe (20) includes a sole (22), an upper (25), and a tongue (26), as well as fasteners (28), such as shoelaces. Incorporated into the sole (22) of the athletic shoe (20) is a receptacle (30) for receiving and retaining a plug-in module (32) in a slide-in, releasably locking arrangement. The plug-in module (32) preferably includes a battery (62), a light emitting device (54), and electrical circuit elements (58, 60, 72) arranged to selectively connect the battery (62) to the light emitting device (54).

Abstract: An athletic shoe (20) includes a sole (22), an upper (25), and a tongue (26), as well as fasteners (28), such as shoelaces. Incorporated into the sole (22) of the athletic shoe (20) is a receptacle (30) for receiving and retaining a plug-in module (32) in a slide-in, releasably locking arrangement. The plug-in module (32) preferably includes a battery (62), a light emitting device (54), and electrical circuit elements (58, 60, 72) arranged to selectively connect the battery (62) to the light emitting device (54).

Abstract: Lightweight, inexpensive footwear sole components (14, 18), comprising a midsole portion (14) and an outsole portion (18), are formed by a method that eliminates the need for adhesively attaching the two portions to each other, and comprises the steps of 1) Forming the midsole portion (14) to have a lower surface (17) and at least one opening (26) extending into it through the lower surface (17); 2) Forming the outsole portion (18) on the lower surface (17) of the midsole portion (14) such that the outsole portion has an upper part (28) extending into the opening (26) in the midsole portion; and, 3) Forming a mechanical attachment device (22) between the outsole portion (18) and the midsole portion (14) on an upper end (19) of the outsole portion (18).