Patents Represented by Attorney, Agent or Law Firm Donald P. Studebaker
  • Patent number: 6821805
    Abstract: Disclosed is a semiconductor device which comprises a substrate in which surface is formed a depression having a closed figure when viewed from the substrate normal and a semiconductor layer which is formed on the surface of the substrate by crystal growth from at least an inside face of the depression.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: November 23, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinji Nakamura, Masahiro Ishida, Kenji Orita, Osamu Imafuji, Masaaki Yuri
  • Patent number: 6731153
    Abstract: A CMOS line driver is made up of p- and nMOS transistors. A pMOS varactor is interposed between the source of the pMOS transistor and a power supply, while an nMOS varactor is interposed between the source of the nMOS transistor and ground. The sizes of each of these MOS varactors may be the same as those of the p- or nMOS transistor. Alternatively, each of these MOS varactors may have a channel area twice greater than that of the p- or nMOS transistor. The inverted version of a signal input to the line driver is supplied to the gates of the MOS varactors. In this manner, the MOS transistors, making up the line driver, can switch at a high speed.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: May 4, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kanji Otsuka, Tamotsu Usami
  • Patent number: 6727553
    Abstract: After a Si layer (2) is formed on a BOX layer (1) of a semiconductor substrate (50), trenches (11) and (15) each reaching the semiconductor substrate (50) are formed. An electric connection is provided between the Si layer (2) and an external circuit by forming a sidewall (18) composed of a conductor material over the side surfaces of the trenches (11) and (15). This facilitates fixation of the body potential of the Si layer (2). Oxidation for rounding off the upper-surface edge portions of the Si layer (2) is further performed with the upper-surface edge portions of the Si layer (2) being exposed and with the lower-surface edge portions of the Si layer (2) being covered with the sidewall (18). As a consequence, the deformation of the lower-surface edge portions of the Si layer (2) resulting from oxidation is less likely to occur and a leakage current resulting from a failure caused by the deformation of the lower-surface edge portions of the Si layer (2) is suppressed.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: April 27, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Naoki Kotani
  • Patent number: 6672052
    Abstract: An exhaust gas purifying apparatus comprises a control unit (29) operative to estimate an amount of NOx absorbed by a NOx trap material (17) disposed in an exhaust passage (10) and to make an air-fuel ratio richer so as thereby to cause the NOx trap material to release sulfur when the estimated amount of NOx absorption exceeds a specified amount. Further, the control unit (29) operative to estimate an amount of sulfur absorbed by the NOx trap material (17) and to make an air-fuel ratio richer and rising a temperature of exhaust gas so as thereby to cause the NOx trap material to release sulfur when the estimated amount of sulfur absorption exceeds a specified amount. The control unit restricts an air-fuel ratio from being made richer when the NOx trap material is not expected to absorb NOx due to progress of sulfur absorption resulting from conditionally the sulfur releasing.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: January 6, 2004
    Assignee: Mazda Motor Corporation
    Inventors: Junichi Taga, Kazuya Yokota, Youichi Kuji
  • Patent number: 6654243
    Abstract: The present invention provides a heat dissipation apparatus for a notebook computer with a low flow resistance design. The notebook computer has a CPU, a heat dissipation apparatus, an air inlet, and an air outlet. The heat dissipation apparatus includes a heat sink, at least a fan, a conduction block, and a heat pipe. The heat sink is used to transmit heat. The conduction block is closely contacted to an upper surface of the CPU in the notebook computer for absorbing the heat from CPU. The heat pipe is connected to the conduction block and the heat sink. The heat pipe is configured for transmitting heat in the conduction block to the heat sink. Then, the heat transferred to the heat sink is carried away by air flow generated by the fan. In the invention, the air flow directions passing through the air inlet and the air outlet are parallel to each other. The air flow resistance is substantially reduced to accelerate the heat dissipation.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: November 25, 2003
    Assignee: Uniwill Computer Corporation
    Inventor: Young-Kwang Sheu
  • Patent number: 6643939
    Abstract: A chain saw with vibration-isolating devices, capable of providing a desirable vibration-isolating effect over a wide frequency range and reducing accidental deviation from a desired cutting line in a cutting operation. The chain saw includes a main body containing an engine, a frame member mounting a grip handle thereon, and at least two vibration-isolating devices each interposed between the main body and the frame member to support the main body with respect to the frame member. Two of the vibration-isolating devices are disposed spaced apart from each other in the longitudinal direction of the chain saw. Each of the two vibration-isolating devises includes a pair of first and second vibration=isolating members which are different in frequency range for providing a vibration-isolating effect. The two vibration-isolating devices are disposed such that the respective first or second vibration-isolating members are positioned in a first or second diagonal relationship with respect to one another.
    Type: Grant
    Filed: December 13, 2001
    Date of Patent: November 11, 2003
    Assignee: Kioritz Corporation
    Inventors: Katsuya Tajima, Hisato Ohsawa, Masato Nara
  • Patent number: 6526644
    Abstract: In a retractable assist grip in which a grip body rotatably supported on a mount is urged into swing motion from the use position to the retracted position, one side surface of a supporting part of the mount is formed integrally with s fulcrum pin extending therefrom. A pin support of a leg of the grip body is journaled on the fulcrum pin. On the other side surface of the supporting part, a recess and a loose-fit pin extending inside the recess from the bottom of the recess are formed coaxially with the fulcrum pin. The leg of the grip body is assembled against relative rotation with a spacer rotatably inserted into the recess and including a pin loose-fitting part for loosely receiving the loose-fit pin therein. A viscidity is provided between the outer periphery of the spacer and the inner periphery of the recess of the mount, thereby forming a damper. Further, a locking pin is retained prior to the mounting of the grip body to the mount.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: March 4, 2003
    Assignee: Nishikawa Kasei Co., Ltd.
    Inventors: Sugumune Miho, Hozumi Noda
  • Patent number: 6512252
    Abstract: A HDTMOS includes a Si substrate, a buried oxide film and a semiconductor layer. The semiconductor layer includes an upper Si film, an epitaxially grown Si buffer layer, an epitaxially grown SiGe film, and an epitaxially grown Si film. Furthermore, the HDTMOS includes an n-type high concentration Si body region, an n− Si region, a SiGe channel region containing n-type low concentration impurities, an n-type low concentration Si cap layer, and a contact which is a conductor member for electrically connecting the gate electrode and the Si body region. The present invention extends the operation range while keeping the threshold voltage small by using, for the channel layer, a material having a smaller potential at the band edge where carriers travel than that of a material constituting the body region.
    Type: Grant
    Filed: November 15, 2000
    Date of Patent: January 28, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Takagi, Akira Inoue
  • Patent number: 6451707
    Abstract: After forming a processed film onto the underlying film formed on the substrate, the processed film is dry etched using a mask pattern so as to form an etched pattern. After the reaction product deposited on a wall of the etched pattern is removed by using the first cleaning solution having relatively low power to etch the processed film and the second cleaning solution having relatively high power to etch the processed film in that order, the etched pattern or its vicinity is rinsed with water.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: September 17, 2002
    Assignee: Matsushita Electronics Corporation
    Inventors: Toshihiko Nagai, Yuichi Miyoshi