Patents Represented by Attorney, Agent or Law Firm Donald T. Studebaker
  • Patent number: 6720226
    Abstract: Gate insulating film, gate electrode made up of lower and upper gate electrodes, and on-gate passivation film are formed in this order on an Si substrate. Then, a sidewall is formed as a stack of an oxynitride sidewall having an L-shaped cross section and a nitride sidewall, so as to surround the gate electrode and on-gate passivation film. Alternatively, only the lower edge of an L-oxide sidewall may be changed into an oxynitride region. Or an oxide or stacked sidewall and a nitride sidewall, covering the oxide or stacked sidewall, may be formed instead of the oxynitride sidewall. In any of these embodiments, the lower edge of the sidewall is not removed during a wet etching process.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: April 13, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Mizuki Segawa