Abstract: Multiple cryptographic algorithms are utilized on a single integrated circuit. In a single special memory, a plurality of values are stored. The values are used for a first cryptographic algorithm and are used for a second cryptographic algorithm. At least one value from the plurality of values is used both for the first cryptographic algorithm and for the second cryptographic algorithm. When performing a first operation for the first cryptographic algorithm, first values from the plurality of values are used. The first values include the value used both for the first cryptographic algorithm and for the second cryptographic algorithm. When performing a second operation for the second cryptographic algorithm, second values from the plurality values are used. The second values also include the value used both for the first cryptographic algorithm and for the second cryptographic algorithm.

Abstract: A resistor formed in a well adjacent to a transistor serves as a ballast resistor for the transistor. The transistor is formed in a first region on a substrate. The first region is of a first conductivity type. A well of second conductivity type is formed adjacent to the first region. A gate region is formed over a portion of the first region. Concurrently, a covering is formed over a first area of the well. The covering and the gate region are comprised of the same material. Source/drain regions of the second conductivity type are formed on either side of the gate region. The source/drain regions are of the first conductivity type. A first source/drain region extends into the well. Concurrent to the forming of the source drain regions, a doped region is formed within the well. The doped region and the first source/drain region have the same doping density. The doped region is physically separated from the first source/drain region by the first area of the well.