Abstract: An algorithmic procedure automatically generates layout of matched capacitor arrays used in A/D converters, D/A converters and programmable gain amplifiers, among other types of devices, using templates to define the style of the layout. Since each array can be generated from a particular template, multiple arrays associated with an IC can be optimized for different purposes to preserve silicon area. The automated technique allows fast and easy migration of an array layout from one process to another and eliminates the manual design work generally associated with capacitor array layout.