Patents Represented by Attorney E. Eric Webostad

Find this attorney in the Justia Lawyer Directory

  • Hard macro-to-user logic interface
    Patent number: 7573295
    Abstract: A hard macro-to-user logic interface of an integrated circuit is described. The integrated circuit includes a core as an application specific circuit block with a transaction interface of a first bit width and includes programmable logic capable of being programmed to instantiate user logic. The user logic has a user interface of a second bit width substantially less than the first bit width. A wrapper circuit couples the user interface and the transaction interface for coupling the core to the user logic.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: August 11, 2009
    Assignee: XILINX, Inc.
    Inventor: Laurent F. Stadler
  • Interpolation of signals from a delay line
    Patent number: 7412477
    Abstract: Method and apparatus for interpolation of signals from a delay line is described. An input signal is obtained from which progressively delayed input signals are generated from the input signal. Two of the progressively delayed input signals are accessed and interpolated to provide a phase-adjusted signal.
    Type: Grant
    Filed: October 7, 2003
    Date of Patent: August 12, 2008
    Assignee: Xilinx, Inc.
    Inventor: John K. Jennings