Abstract: Nodule formation in a continuous electroless copper plating system is minimized by independently controlling the dissolved oxygen contents on the plating solution in the bath and in the associated external piping. The level of dissolved oxygen in the plating tank is maintained at a value such that satisfactory plating takes place. At the point where the plating solution leaves the tank, additional oxygen gas is introduced into the solution so that the level of dissolved oxygen in the plating solution in the external piping is high enough to prevent any plating from taking place in the external piping and so that in the external piping the copper is etched or dissolved back into solution. At the end of the external piping, the dissolved oxygen level is reduced so that the dissolved oxygen level of the plating solution in the tank is maintained at the level where plating will take place.

Abstract: A high speed multiplier unit for multiplying both fixed point and floating point operands is disclosed and claimed. This multiplier unit is a system level functional unit which allows floating point and fixed point operations to be performed directly. In addition to multiplication, the multiplier unit performs exponent calculation, post-normalization, and error detection. The multiplier unit also provides for overlapped loading of operands.

Abstract: An integrated circuit module to printed circuit board interconnection system wherein the board has circuit pads to which spring contacts have one of their ends soldered to the pads. The module has circuit pads on one surface thereof and a pivotal connection is provided for loading the module onto the circuit board whereby the opposite ends of the spring contacts engage the circuit pads on the module with a wiping action and are retained in engagement therewith.

Abstract: Supplying of foils to be applied to both sides of a workpiece. Opposing feeding drums have identical exchangeable segments whose circumferential lengths correspond to the length of the respective foil segment lamina, and whose segment angle sums are less than 360.degree.. In order to affix a leading edge of the foil to the leading edge of the workpiece, the foil is cut at the back end of the segment, and a first segment (on whose circumference the foil segment lamina is fixed) is moved toward the workpiece. After the foil adheres to the board, the drum segment is withdrawn. During the course of further movement of the workpiece, the foil segment is stripped off the segment by use of a laminating roller and a vacuum shoe. The drum is then rotated so that for the next workpiece to be laminated, the second segment will become operative as a supply element for the foil.

Abstract: Multilayer printed circuit boards are designed and produced using a selective wiring technique which segregates short, medium length and long lines. By placing short medium length and long lines on different layers, line specifications can be relaxed for the layers with shorter lines. This relaxation of specifications allows for the effective use of subtractive, additive and encapsulated wire manufacturing techniques in the production of complex multilayer printed circuit boards. Each layer of segregated line lengths is fabricated in accordance with the appropriate technique for a given line length to obtain a multilayer printed circuit board optimized for cost and/or performance and reliability.

Abstract: A separator plate for a type band printer is located between the print paper and a ribbon so as to prevent the ribbon from contacting the paper. The upper edge of the separator plate is located adjacent to the print line and pushes the paper away from the ribbon against the hammer plate. The separator plate is affixed to the printer.

Abstract: An electromagnet consists of two essentially symmetrically designed magnetizable E-shaped yoke halves each embraced by a coil. The facing pole ends of the yoke halves form three aligned operating gaps. Between the operating gaps a tongue-shaped ram is arranged which is shiftable in the direction of the line of alignment of the operating gaps. The cross-section of the ram is adapted to the area of the operating gaps. The ram comprises cuboid-shaped armature bars of magnetizable material. The armature bars are geometrically designed in such a manner that their volume is on the order of magnitude of the operating gap volume. In the original position of the ram the armature bars are essentially positioned in front of the operating gaps of the electromagnet. Upon excitation of the electromagnet, the armature bars are pulled into its operating gaps, being accelerated in the process.The windings of the coils exciting the yoke halves are essentially positioned between the E-legs of the yoke halves.

Abstract: An improved data processor control subsystem in which a cycle counter having a plurality of cascade-connected stages also comprises one or more supplemental or dummy stages, which can be selectively inserted or removed from the chain of cascade-connected stages, to alter the number of sub-cycles in an operating cycle, thereby decreasing the complexity of associated decoding circuitry.

Abstract: A two-level storage hierarchy for a data processing system is directly addressable by the main processor. The two-level storage includes a high speed, small cache with a relatively slower, much larger main memory. The processor requests data from the cache and when the requested data is not resident in the cache, it is transferred from the main memory to the cache and then to the processor. The data transfer organization maximizes the system throughput and uses a single integrated control to accomplish data transfers.

Abstract: For a computer system having an array of external registers which may be used as a data source or data destination, wherein such system uses an odd parity checking system, and wherein certain of the register position in the external array can be vacant, an improved parity checking configuration includes a plurality of parity bit latches, one for each location in the external register array. The parity bit latches are set by an initial microprogram load to provide an odd parity bit for each location in the external array of registers which is empty or which may be faulty, disabled or malfunctioning. This assures that when the external array is searched by row, that all of the array locations will provide the appropriate parity check regardless of whether a byte of information exists therein or not.