Abstract: A system and method for concurrent operations in a microcontroller's program memory is provided. In one exemplary embodiment, a microcontroller system is provided that includes a microcontroller, programmable read-only memory (PROM), random access memory (RAM) and a bridge circuit disposed between the PROM and microcontroller. The bridge is adapted with memory-mapped registers to map specific address locations from RAM to PROM, to permit the microcontroller to update PROM while concurrently executing code from RAM. In another exemplary embodiment, the bridge circuitry includes microcontroller reset and RAM enable/disable capabilities to further efficiently manage memory resources.

Abstract: A write head circuit is provided having improved transient and steady state response. The circuit includes a dynamically coupled damping circuit that is coupled to the write head during transient periods of a write signal to substantially reduce or eliminate overshoot generated by a write head cable. During steady state or data writing periods, the damping circuit is decoupled from the write head to prevent unnecessary loading of the write head. In preferred embodiments, the damping circuit includes a resistor in series with a capacitor, and the damping circuit is coupled in parallel to the write head. The resistor substantially reduces the overshoot of a write signal supplied to the write head, while the capacitor decouples the resistor from the write head during steady state or data write periods.