Patents Represented by Attorney, Agent or Law Firm Eduardo E. Drake
  • Patent number: 7784004
    Abstract: Integrated circuits, key components in thousands of products, frequently include thousands and even millions of microscopic transistors and other electrical components. Because of difficulties and costs of fabricating these circuits, circuit designers sometimes ask fabricators to produce skew lots for testing and predicting manufacturing yield. However, conventional skew lots for CMOS circuits, which are based on increasing or decreasing transistor transconductance, are not very useful in testing certain types of analog circuits, such as oscillators. Accordingly, the present inventors developed a new type of skew lot, based on increasing or decreasing gate-to-source capacitance of transistors, or more generally a transistor characteristic other than transconductance. This new type of skew lot is particularly suitable for simulating, testing, and/or making yield predictions for oscillators and other CMOS analog circuits.
    Type: Grant
    Filed: April 21, 2005
    Date of Patent: August 24, 2010
    Assignee: Xilinx, Inc.
    Inventors: Brian T. Brunn, Brian K. Seemann
  • Patent number: 6650195
    Abstract: Many electronic devices, such as computers and printers, communicate data to each other over wireline or wireless communications links. One component vital to such communications is a voltage-controlled oscillator (VCO)—a circuit that outputs an oscillating signal having an oscillation frequency based on a control voltage. Conventional VCOs adjust frequency based on a single control voltage input, which makes them vulnerable to unintended changes in the control voltage (and power-supply voltages relative to the control voltage.) These voltage changes cause frequency deviations that can make communications between devices less reliable. Accordingly, the present inventors devised a VCO that includes differential frequency control—frequency control based on the difference of two control voltages.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: November 18, 2003
    Assignee: Xilinx, Inc.
    Inventors: Brian Taylor Brunn, Ramesh Harjani
  • Patent number: 6631101
    Abstract: Battery-powered computer systems have evolved into multi-media systems which can playback two-hour movies stored on Digital Versatile Disks (DVDs). However, battery lives are generally too short to permit users to view an entire movie without interruption, requiring users who resume playback to fast-forward to an approximate point where the interruption occurred. Accordingly, the present invention provides system, method, and software embodiments which monitor battery status during DVD playback, and upon detection of low battery level, record a current playback position. Subsequent to the replacement or recharge of the battery, playback may be automatically resumed at the recorded playback position, thereby saving both time and power in recovering from the interruption. Other embodiments omit battery monitoring by periodically recording playback position and facilitate recovery from interruptions of data-transfer operations.
    Type: Grant
    Filed: March 16, 1999
    Date of Patent: October 7, 2003
    Assignee: Gateway, Inc.
    Inventors: Rix S. Chan, George Watchorn
  • Patent number: 6507220
    Abstract: A typical occurrence in communication circuits, such as transmitters and receivers, is the internal transfer of a sequence of pulses, known as a clock signal, from an amplifier to a digital circuit. For proper operation, it is critical that the digital circuit accurately comprehends the clock signal. However, in some communications circuits a phenomenon called duty-cycle distortion—that is, a distortion of the apparent duration of the pulses in clock signals—causes the digital circuit to read the clock signals as having a longer or shorter duration than intended. Accordingly, the inventors devised unique circuitry for correcting or preventing this distortion. One exemplary circuit uses a voltage divider, comprising a pair of transistors, to set the DC or average voltage of the clock signals input to the digital circuit at a level approximating the logic threshold voltage of the digital circuit.
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: January 14, 2003
    Assignee: Xilinx, Inc.
    Inventors: Eric Douglas Groen, Charles Walter Boecker
  • Patent number: 6504415
    Abstract: In many electronic systems, it is common to communicate data from a transmitter in one device to a receiver in another. Accurate communications requires use of several matched clock signals. Mismatches in these clock signals cause transmitters to add “jitter” to transmitted data or receivers to be more intolerant of jitter in received signals, increasing the chances of mis-interpreting the data. Accordingly, the inventors devised an exemplary clock-distribution method which entails generating a base set of matched clock signals, deriving at least two separate sets of matched clock signals from the base set, and distributing one of the sets of clock signals to a set of matched components in a circuit and the other set of matched clock signals to a different set of components in the same circuit. The clock signals driving the matched components are isolated from mismatched aspects of the other components, and thus exhibit better matching.
    Type: Grant
    Filed: August 28, 2001
    Date of Patent: January 7, 2003
    Assignee: Xilinx, Inc.
    Inventors: Moises E. Robinson, Ahmed Younis
  • Patent number: 6501339
    Abstract: Electronic devices are typically coupled together to operate as systems that require the communication of data from one device to another. Many such devices include a ring oscillator, a circuit that generates one or more oscillating signals using a series of interconnected delay circuits. One problem with conventional ring oscillators concerns differences in the signal paths between the delay circuits. Accordingly, the present inventors devised several oscillators having unique layouts, which reduce differences in the signal paths between delay circuits. One exemplary oscillator includes a sequence of delay circuits having input-output connections between at least two pairs of non-adjacent delay circuits. Another exemplary oscillator provides two groups of delay circuits with a bus between the two groups, intercoupling the circuits. And, another exemplary oscillator arranges three or more delay circuits to form a closed loop.
    Type: Grant
    Filed: August 10, 2001
    Date of Patent: December 31, 2002
    Assignee: Xilinx, Inc.
    Inventors: Ahmed Younis, Moises E. Robinson, Michael A. Nix, Brian T. Brunn
  • Patent number: 6392486
    Abstract: With emergence of Bluetooth™ and other wireless standards, it has become increasingly desirable and practical to use low-cost wireless links, instead of cables, between devices, such as computers, printers, and personal digital assistants. Vital to these wireless links are the amplifiers that receive transmitted signals. One amplifier form, known as a common-gate amplifier, generally includes bias circuitry that requires large areas of an integrated-circuit chip or increases power usage and adds noise. Accordingly, the inventor devised an exemplary common-gate amplifier that includes an inductor coupled between the gate and drain of an amplifying transistor. The inductor acts as a short circuit at low frequencies, forcing the transistor to function at these frequencies as a diode and thus reduces the need for further bias circuitry. Other inventive embodiments include wireless receivers, transceivers, programmable integrated circuits, and electronic devices that incorporate the exemplary amplifier.
    Type: Grant
    Filed: August 14, 2001
    Date of Patent: May 21, 2002
    Assignee: Xilinx, Inc.
    Inventor: Normand T. Lemay, Jr.
  • Patent number: 6385490
    Abstract: Implantable defibrillators are implanted into the chests of patients prone to suffering ventricular fibrillation, a potentially fatal heart condition. Critical components in these devices are aluminum electrolytic capacitors, which store and deliver one or more life-saving bursts of electric charge to a fibrillating heart. These capacitors make up about one third the total size of the defibrillators. Unfortunately, manufacturers of these capacitors have paid little or no attention to reducing the size of these capacitors through improved capacitor packaging. Accordingly, the inventors devised a unique capacitor lid, or header, assembly that allows size reduction. Specifically, one embodiment of the header assembly includes two recesses, each with a depth that allows the head of a rivet (or other fastener) to be substantially flush, or coplanar, with the underside of the header. Another embodiment includes a single recess to receive two rivet heads.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: May 7, 2002
    Assignee: Cardiac Pacemakers, Inc.
    Inventors: Michael J. O'Phelan, Robert R. Tong, Luke J. Christenson, Steven A. Rubin
  • Patent number: 6359328
    Abstract: The inventor devised methods of forming interconnects that result in conductive structures with fewer voids and thus reduced electrical resistance. One embodiment of the method starts with an insulative layer having holes and trenches, fills the holes using a selective electroless deposition, and fills the trenches using a blanket deposition. Another embodiment of this method adds an anti-bonding material, such as a surfactant, to the metal before the electroless deposition, and removes at least some the surfactant after the deposition to form a gap between the deposited metal and interior sidewalls of the holes and trenches. The gap serves as a diffusion barrier. Another embodiments leaves the surfactant in place to serve as a diffusion barrier. These and other embodiments ultimately facilitate the speed, efficiency, or fabrication of integrated circuits.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: March 19, 2002
    Assignee: Intel Corporation
    Inventor: Valery Dubin
  • Patent number: 6357011
    Abstract: A computer system typically includes a central computer and several peripherals, such as a mouse and a printer, which communicate with the computer via a communications channel known as a serial bus. The serial bus may also supply a limited amount of power to some peripherals. Unfortunately, the power limit compels high-power peripherals to include independent power supplies, an arrangement which increase their complexity and cost. Accordingly, one embodiment of the present invention provides a bus-powered peripheral that includes a controller, a rechargeable battery, and a voltage regulator or recharge circuit. The recharge circuit monitors data on a serial bus, recharges the battery during inactive periods, and allows the battery to supplement bus power during active periods, thereby overcoming the power limit of the serial bus.
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: March 12, 2002
    Assignee: Gateway, Inc.
    Inventor: Timothy G. Gilbert
  • Patent number: 6314321
    Abstract: Thousands of patients prone to irregular and sometimes life threatening heart rhythms have miniature heart-monitoring devices, such as defibrillators and cardioverters, implanted in their chests. These devices detect onset of abnormal heart rhythms and automatically apply one or more shocks to their hearts. When properly sized and timed, the shocks restore normal heart function without human intervention. A critical part of these devices is the monitoring circuitry, which includes a microprocessor and stored instructions, or algorithms, that govern how the devices interpret and react to electrical signals indicative of abnormal heart rhythms. Often, the algorithms are too simple or too complex. Algorithms that are too simple lead to unnecessary shocking of the heart, while those that are too complex consume considerable battery power. Accordingly, the inventor devised a relatively simple and accurate algorithm for determining appropriate therapy options.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: November 6, 2001
    Assignee: Cardiac Pacemakers, Inc.
    Inventor: Milton M. Morris
  • Patent number: 6309950
    Abstract: Some advanced integrated circuits are fabricated as silicon-on-insulator structures, which facilitate faster operating speeds, closer component spacing, lower power consumption, and so forth. Unfortunately, current bonded-wafer techniques for making such structures are costly because they waste silicon. Accordingly, one embodiment of the invention provides a smart-bond technique that allows repeated use of a silicon wafer to produce hundreds and potentially thousands of silicon-on-insulator structures, not just one or two as do conventional methods. More precisely, the smart bond technique entails bonding selected first and second regions of a silicon substrate to an insulative substrate and then separating the two substrates to leave silicon protrusions or islands on the insulative substrate. The technique is also suitable to forming three-dimensional integrated circuits, that is, circuits having two or more circuit layers.
    Type: Grant
    Filed: March 23, 2000
    Date of Patent: October 30, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Leonard Forbes
  • Patent number: 6304778
    Abstract: Miniature defibrillators and cardioverters detect abnormal heart rhythms and automatically apply electrical therapy to restore normal heart function. Therapy decisions are typically based on the time between successive beats of various chambers of the heart, such as the left atrium and left ventricle. To prevent confusing a left ventricle beat for a left atrium beat, some devices use cross-chamber blanking, a technique which disables sensing of atrial beats for a certain time period after sensing. Conventionally, these devices lack any mechanism for adjusting length of this period. Accordingly, the inventor devised a implantable device including a mechanism for adjusting this time period. This mechanism ultimately allows tailoring of the cross-chamber blanking period to fit the needs of individual patients.
    Type: Grant
    Filed: August 20, 1999
    Date of Patent: October 16, 2001
    Assignee: Cardiac Pacemakers, Inc.
    Inventors: James O. Gilkerson, Doug M. Birkholz, David L. Perschbacher
  • Patent number: 6288437
    Abstract: A typical integrated circuit includes millions of microscopic transistors, resistors, and other components interconnected to define a circuit, for example a memory circuit. Occasionally, one or more of the components are defective and fabricators selectively replace them by activating spare, or redundant, components included within the circuit. One way of activating a redundant component is to rupture an antifuse that effectively connects the redundant component into the circuit. Unfortunately, conventional antifuses have high and/or unstable electrical resistances which compromise circuit performance and discourage their use. Accordingly, the inventors devised an exemplary antifuse structure that includes three normally disconnected conductive elements and a programning mechanism for selectively moving one of the elements to electrically connect the other two.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: September 11, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Leonard Forbes, Jerome M. Eldridge
  • Patent number: 6288442
    Abstract: A typical integrated circuit interconnects millions of microscopic transistors and resistors with aluminum wires buried in silicon-dioxide insulation. Yet, aluminum wires and silicon-dioxide insulation are a less attractive combination than gold, silver, or copper wires combined with polymer-based insulation, which promise both lower electrical resistance and capacitance and thus faster, more efficient circuits. Unfortunately, conventional etch-based techniques are ineffective with gold, silver, or copper, and conventional polymer formation promote reactions with metals that undermine the insulative properties of polymer-based insulations. Accordingly, the inventor devised methods which use a liftoff procedure to avoid etching problems and a non-acid-polymeric precursor and non-oxidizing cure procedure to preserve the insulative properties of the polymeric insulator. The resulting interconnective structures facilitate integrated circuits with better speed and efficiency.
    Type: Grant
    Filed: September 10, 1998
    Date of Patent: September 11, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Paul A. Farrar
  • Patent number: 6283985
    Abstract: Miniature defibrillators and cardioverters detect abnormal heart rhythms and automatically apply electrical therapy to restore normal heart function. Critical components in these devices are aluminum electrolytic capacitors, which store and deliver one or more life-saving bursts of electric charge to a heart of a patient. This type of capacitor requires regular “reform” to preserve its charging efficiency over time. Because reform expends valuable battery life, manufacturers developed wet-tantalum capacitors, which are generally understood not to require reform. Yet, the present inventors discovered through extensive study that wet-tantalum capacitors exhibit progressively worse charging efficiency over time. Accordingly, to address this problem, the inventors devised unique reform techniques for wet-tantalum capacitors.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: September 4, 2001
    Assignee: Cardiac Pacemakers, Inc.
    Inventors: Robert S. Harguth, Ron Balczewski, William J. Linder, Gregory Scott Munson, Michael Wesley Paris
  • Patent number: 6284656
    Abstract: A typical integrated circuit interconnects millions of microscopic transistors and resistors with aluminum wires buried in silicon-dioxide insulation. Yet, aluminum wires and silicon-dioxide insulation are less attractive than copper wires and polymer-based insulation, which promise both lower electrical resistance and capacitance and thus faster, more efficient circuits. Unfortunately, current techniques cannot realize the promise because copper reacts with the polymer-based insulation to form copper dioxide within the polymer, reducing effectiveness of the copper-polymer combination. Accordingly, the inventor devised a method which uses a non-acid-precursor to form a polymeric layer and then cures, or bakes, it in a non-oxidizing atmosphere, thereby making the layer resistant to copper-dioxidizing reactions. Afterward, the method applies a copper-adhesion material, such as zirconium, to the layer to promote adhesion with a subsequent copper layer.
    Type: Grant
    Filed: August 4, 1998
    Date of Patent: September 4, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Paul A. Farrar
  • Patent number: 6275729
    Abstract: Implantable defibrillators are implanted into the chests of patients prone to suffering ventricular fibrillation, a potentially fatal heart condition. A critical component in these devices is an aluminum electrolytic capacitors, which stores and delivers one or more life-saving bursts of electric charge to a fibrillating heart. These capacitors make up about one third the total size of the defibrillators. Unfortunately, conventional manufacturers of these capacitors have paid little or no attention to reducing the size of these capacitors through improved capacitor packaging. Accordingly, the inventors contravened several conventional manufacturing principles and practices to devise unique space-saving packaging that allows dramatic size reduction.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: August 14, 2001
    Assignee: Cardiac Pacemakers, Inc.
    Inventors: Michael J. O'Phelan, James M. Poplett, Robert R. Tong, Alexander Gordon Barr
  • Patent number: 6249165
    Abstract: In digital circuits, such as memory circuits, it is sometimes necessary to delay one signal a precise amount of time relative a reference signal. One way to do this is to feed the reference signal to a delay-locked loop which generates a set of signals, each delayed a different amount relative the reference signal. However, as circuits get faster and faster, conventional delay-locked loops require the addition of extra interpolation circuitry to generate smaller delays, and thus consume considerable power and circuit space. Accordingly, the inventor devised a circuit which interlaces and synchronizes two delay-locked loops, each including a number of controllable delay elements linked in a chain. In one embodiment, the first loop produces a sequence of clock signals delayed an even number of delay periods relative a reference clock signal, and the second loop produces a sequence of clock signals delayed an odd number of delay periods relative the reference clock signal.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: June 19, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Ronnie M. Harrison
  • Patent number: 6208016
    Abstract: A typical integrated circuit interconnects millions of microscopic transistors and resistors with aluminum wires buried in silicon-dioxide insulation. Yet, aluminum wires and silicon-dioxide insulation are a less attractive combination than gold, silver, or copper wires combined with polymer-based insulation, which promise both lower electrical resistance and capacitance and thus faster, more efficient circuits. Unfortunately, conventional etch-based techniques are ineffective with gold, silver, or copper, and conventional polymer formation promote reactions with metals that undermine the insulative properties of polymer-based insulations. Accordingly, the inventor devised methods which use a liftoff procedure to avoid etching problems and a non-acid-polymeric precursor and non-oxidizing cure procedure to preserve the insulative properties of the polymeric insulator. The resulting interconnective structures facilitate integrated circuits with better speed and efficiency.
    Type: Grant
    Filed: February 24, 1999
    Date of Patent: March 27, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Paul A. Farrar