Abstract: For a serial-bit, programmable microinstruction processor having serial-byte internal transfers, an expanded-memory addressing apparatus and method is provided by the incorporation into the processor system a plurality of external memory units and a selection and transfer circuitry for accessing external memory space from within the processor. The accessing of external memory locations may be controlled by programmed memory access command instructions. These instructions may be operated upon by decoding components and buffer storage components to make available, concurrently, the entire contents of a particular one of the external memory units. Once a particular memory, or page is selected, a location within that page may then be addressed by memory address registers within the base processor.