Abstract: There is provided according to the invention a method and apparatus for eliminating or minimizing the error due to amplifier offset or drift error in an integrating dual slope analog-to-digital converter. The converter is provided with a switching and control arrangement whereby the integrating capacitor is charged for one-half of the predetermined charging time as a function of the sum of the levels of the unknown signal and the error signal. The integrating capacitor is charged for the remaining half of the predetermined time period as a function of the difference of the levels of the unknown signal and the error signal so that the capacitor reaches a level of charge which is a function of the level of the unknown signal substantially unaffected by the level of the error signal.
Type:
Grant
Filed:
March 6, 1992
Date of Patent:
November 2, 1993
Assignee:
John Fluke Mfg. Co., Inc.
Inventors:
Richard E. George, A. Brinkley Barr, Thomas W. Wiesmann, deceased