Abstract: A change in direction of a moving member is detected on the first edge of a quadrature tach pulse which is out of a given sequence, and a clock pulse is supplied whose rising edge always occurs after the direction change.

Abstract: A parallel-to-serial converter for synchronously converting parallel data transferred by one or more parallel data channels into corresponding serial data streams having respectively programmable frequency ratios of the serial output data bits.

Abstract: Circuit and method for providing a D.C. controlled adjustable ramp signal which maintains a predetermined ramping period for respectively adjusted optimum signal levels within the operating range. An example of a circuit of the invention is described for providing an automatically controlled bias or erase ramp signal in a magnetic recorder.

Abstract: A circuit and method for providing two or more synchronous clock signals whose respective frequency ratios can be readily changed with respect to a master clock signal frequency.

Abstract: A magnetic recorder including a playback circuit for decoding a ternary waveform digital data signal is disclosed, wherein positive and negative threshold levels, used to distinguish between signal levels representative of data ones from signal levels representative of data zeros, are automatically adjusted to compensate for occasional reductions in overall signal level that can occur due to dropouts and modulation noise on the magnetic medium. Two sample and hold units are used to generate an output signal whose amplitude reflects only those signal levels that are greater than some minimum absolute value. This output signal is filtered and then used to generate the compensated positive and negative threshold levels.

Abstract: A serial-to-parallel converter receives serial data bits forming serial input words and serial word synchronizing pulses indicating the length of the serial input words. A parallel clock signal is generated synchronously with an integer number of serial word synchronizing pulses. The input data is sequentially supplied via a direct data path to an output storage means. A synchronous counter counts the received consecutive serial data bits and in response to each count a decoder sequentially enables one respective output storage means to store therein one data bit. The stored data is released simultaneously from the output storage means in form of a parallel word in response to the parallel clock signal. Means for changing the length of the parallel output word are provided.

Abstract: Two closely spaced magnetostatically coupled magnetoresistive elements are arranged with their respective planar surfaces in parallel. A nonmagnetic insulating material is interposed between the elements to prevent exchange coupling. Sense current flows simultaneously through both elements in the same direction and in perpendicular to the easy axis of magnetization. In response to signal fields applied in parallel with the sense current flow demagnetization components in the easy axis direction cancel. The output signal of the transducer is independent of recording track width and free of Barkhausen noise.

Abstract: The transducer has a pole tip plate containing magnetic pole tips defining transducing gaps and a core housing providing electric shielding and containing magnetic cores engaging the poles. The tip plate has a first part of a wear-resistant, nonmagnetic, machinable material in the transducer-to-medium interface area, providing long wear, and an integrally joined contiguous second part of a conductive, nonmagnetic, machinable material, providing electric shielding.In accordance with the method, corresponding surfaces of a first block portion made of nonmagnetic, wear-resistant, machinable material and of a second block portion made of a nonmagnetic, conductive, machinable material are integrally joined together. Pole tips are secured into parallel grooves machined transversely to the joined surfaces to form a half-tip plate.

Abstract: Filters are coupled to receive an uncorrected composite color television signal, which signal has been subjected to recording and reproducing operations and processed to have incoherent luminance and chrominance components, with the chrominance component color corrected. The filters separate the composite signal into its luminance and chrominance components. The chrominance component is coupled to a decoder to prepare it for subsequent encoding relative to a chrominance subcarrier reference signal that is coherent with the luminance component. The chrominance subcarrier reference signal is provided by a generator that is frequency and phase adjusted relative to the luminance component. A following encoder receives the decoded chrominance component and reference signal. The encoder responsively operates to provide a newly encoded chrominance component stabilized to the reference signal. This causes the newly encoded chrominance component to be coherent with the luminance component.

Abstract: Minimal realization of an optimum amplitude and phase equalizer is disclosed. A first amplifier circuit including first respective passive filter elements provides both high and low frequency amplitude equalization. A second amplifier circuit including second respective passive filter elements provides first, second or higher order phase equalization, respectively, with gain. The equalizer operates between voltage sources and virtual ground to minimize noise picked up from parasitic capacities and external sources.

Abstract: A multiple leg magnetic transducer has two corresponding core portions abutting at a transducing gap plane. Each portion has a transducing gap defining pole and a multiple leg back core contiguous with the pole. A nonmagnetic side piece supports the pole and intermediate leg portions while a rear leg portion most distant from the pole is unsupported by the side piece. The thusly supported portions are pressed together in a direction towards the transducing gap plane while the rear leg portions flex in the opposite direction to obtain an intimate contact between all corresponding end faces of the abutting core portions. In the preferred embodiment the flexed leg portions are firmly supported by a bonding material.

Abstract: Members of magnetic material are attached at a front end surface of a multichannel magnetic transducer to form an asymmetric magnetic circuit. A member is attached to one magnetic pole of each pair of poles forming a transducing channel. The members on consecutive adjacent channels are attached alternatively to poles located on the opposite sides of the transducer front end surface. The members are placed out of contact with the recording medium and at a distance from the transducing gaps to prevent magnetic coupling therewith, respectively.

Abstract: A digital circuit for generating a linearly increasing signal is provided for controlling the level of a recording A. C. bias signal. The digitally controlled bias signal is mixed with an analog signal of a known frequency and constant level and recorded. The circuit detects and stores a recording bias level corresponding to a reproduce signal envelope level, equal to an obtained peak level adjusted with respect to a known overbias level. The circuit compensates the detected recording bias level with respect to distance between the recording and reproducing heads to obtain an optimum recording bias level. The detected bias level remains stored and unchanged during power supply interruption.

Abstract: A compensation circuit for overshoot, undershoot and delay occurring in response to sudden D. C. level changes in signals received by reactive filters. A D. C. level change, represented by an input signal step applied to the reactive filter is detected by the compensation circuit. The compensation circuit responsively provides a compensation D. C. signal step of a predetermined magnitude and polarity with respect to the input signal step. The compensation step is applied by the circuit to the signal return line of the reactive filter, simultaneously with the input signal step received by the filter to maintain a substantially constant D. C. signal level with respect to the reactive filter elements. The reactive filter elements are thus prevented from charging and discharging in response to the input signal step and filter delay is eliminated.

Abstract: A transducer core comprises a magnetic core superposed and integrally joined with a supporting composite body. The magnetic core has poles defining at least one nonmagnetic gap therebetween. The composite body has a nonmagnetic front portion spanning the nonmagnetic gap of the superposed magnetic core and a contiguous magnetic back portion. The superposed magnetic core and composite body are provided with overlapping grooves forming a window adapted to receive transducer windings.

Abstract: A circuit for digitally encoding an analog television signal by sampling is provided. The circuit includes an analog-to-digital encoder which receives both the analog television signal and a sampling signal generated by the circuit. A clock signal generator is utilized providing a signal of a frequency equal to a first integral multiple of a desired sampling signal frequency and to a second integral multiple of the frequency of a synchronizing component of the television signal. The clock signal is phase-locked to that synchronizing component. A frequency divider is utilized to divide the frequency of the clock signal to provide a sampling signal of a desired frequency. The resulting sampling signal frequency is a non-integral rational multiple of the horizontal sync frequency. The frequency divider is set during each horizontal blanking period to a predetermined state to provide a sampling signal whose phase is the same at the beginning of each horizontal line of the analog television signal.

Abstract: A frequency equalization circuit includes an active filter circuit. The filter circuit differentiates the input signal. A plurality of adjustable resistances are connected to the differentiator corresponding to a plurality of operating or frequency ranges. A switch selects one resistance in accordance with one selected operating range to connect the filter circuit to an amplifier.