Abstract: A method and apparatus for a wireless communication system, for frequency hopping using frequency fraction reuse scheme. The frequency hopping pattern is generated by dividing a portion of frequency into plurality of sub-bands, dividing a portion of time into plurality of sectors, each sector comprising the divided sub-bands, designating one of the divided sub-band within one of the sectors as the restricted sub-band, and allocating a location the designated sub-band as a restricted sub-band.

Abstract: A phase locked loop (PLL) device is configurable in an analog phase locked loop and a hybrid analog-digital phase locked loop. In an analog mode, at least a phase detector, an analog loop filter, and a voltage controlled oscillator (VCO), are connected to form an analog loop. In a digital mode, at least the phase detector, the voltage controlled oscillator (VCO), a time to digital converter (TDC), a digital loop filter and a digital to analog converter (DAC) are connected to form the hybrid digital-analog loop.

Abstract: A charge pump includes an UP current mirror and a DN current mirror. The UP current mirror is controlled by an input UP signal and supplies charge onto an output node. The DN current mirror is controlled by an input DN signal and draws charge from the output node. The input UP and DN signals may be received from a phase detector in a Phase-Locked Loop (PLL). To prevent disturbances on bias nodes of the UP and DN current mirrors that otherwise might occur, replica circuits of portions of the UP and DN current mirrors are provided. Each replica circuit is coupled to a bias node of a corresponding current mirror, but is controlled by an input signal of opposite polarity to the input signal that controls the current mirror so that the replica circuit creates disturbances that tend to counteract disturbances created by switching of the current mirror.

Abstract: Techniques for transmitting and receiving data with multi-level feedback of acknowledgement (ACK) and negative acknowledgement (NACK) are described. In an aspect, a receiver may send a NACK if high peak-to-average-power ratio (PAPR) is detected for a transmission of a packet. A transmitter may adjust at least one transmission parameter (e.g., increase back-off of a power amplifier) in response to receiving the NACK from the receiver. In another aspect, a receiver may send a NACK of a first type (NACK Type 1) if high PAPR is detected for a transmission of a packet and may send a NACK of a second type (NACK Type 2) if the packet is decoded in error. A transmitter may treat NACK Type 1 and NACK Type 2 in similar manner and may send another transmission of the packet.

Abstract: A wireless communication device includes a component operating in a single frequency mode. The component includes a first differential branch that includes first input nodes and first output nodes. The first output nodes are coupled to ground. A second differential branch includes second input nodes, second output nodes, and a first planar inductor coupling a first terminal and a second terminal to ground. A third differential branch includes third input nodes, third output nodes, and a second planar inductor. The second planar inductor is formed within the first planar inductor of the second differential branch and couples a third terminal and a fourth terminal to ground. The third and fourth terminals are electrically independent from the first planar inductor and the first and second terminals. The second and third differential branches form a dual inductor circuit.

Abstract: A low drop-out (LDO) voltage regulator with a wide bandwidth power supply rejection ratio (PSRR) is described. In one aspect, the LDO voltage regulator includes two individual voltage regulator circuit stages. A first stage voltage regulator circuit output is at an intermediate voltage (VINT) between an input supply voltage (VDD) and a final regulated output voltage (VREG). A second stage voltage regulator circuit output is at the final regulated output voltage (VREG) and is optimized for noise-sensitive analog circuits across a wide operating bandwidth. The first stage voltage regulator circuit has a zero frequency while the second stage voltage regulator circuit has a matching pole frequency to minimize the AC response from VDD to VREG across all frequencies.

Abstract: A VCO includes a transformer-based resonator that has a first LC tank and a second LC tank. The resonator has an even resonant mode and an odd resonant mode. The VCO further includes an active transconductance network that is coupled to a two-terminal port of the first tank and is also coupled to a two-terminal port of the second tank. A first terminal of the port of the first tank is capacitively coupled to a first terminal of the port of the second tank. A second terminal of the port of the first tank is capacitively coupled to a second terminal of the port of the second tank. The active transconductance network causes the resonator to resonate in a selectable one of the even and odd resonant modes depending on a digital control signal. The VCO is fine tuned by changing the capacitances of capacitors of the tanks.

Abstract: Techniques for detecting and mitigating interference are described. A device (e.g., a cellular phone) senses interference levels and digitally reconstructs the expected interference in the received signal. The device may correlate the reconstructed interference with the received signal and determine interference in the received signal based on correlation results. The device may adjust the operation of one or more circuit blocks (e.g., a mixer, an LNA, etc.) in a receiver based on the detected interference in the received signal. Alternatively or additionally, the device may condition the digital interference to obtain conditioned reconstructed interference matching the interference in the received signal and may then subtract the conditioned interference from the received signal.

Abstract: Systems, methods and apparatuses for reducing HARQ retransmissions using peak power management techniques are presented. In one example, a receiver may perform multi-level error correction for reducing HARQ retransmissions. The receiver may include a Peak-to-Average-Power Ratio Management Module (PAPR MM) decoder configured to perform a first level of error correction utilizing retransmissions originating at a front end of a distal transmitter. The receiver may further include a symbol demapping module connected to the PAPR MM decoder, a deinterleaver connected to the symbol demapping module, and a decoder connected to the deinterleaver and the PAPR MM decoder, where the decoder may be configured to perform a second level of error correction utilizing retransmissions originating at a back end of the distal transmitter. A transmitter for reducing HARQ retransmissions using PAPR techniques is also presented.

Abstract: An oscillator is disclosed. The oscillator includes a first capacitor. The oscillator also includes a second capacitor. The oscillator further includes a first current source. The oscillator also includes a second current source. The oscillator further includes a comparator that has a first input and a second input. The oscillator also includes a reference node. The oscillator further includes a controller that is configured to selectively couple the first current source to the first capacitor and the second current source to the reference node during a first time period.

Abstract: This disclosure describes a dual inductor circuit, which may be particularly useful in a mixer of a wireless communication device to allow the mixer to operate for two different frequency bands. The dual inductor circuit comprises an inductor-within-inductor design in which a small inductor is disposed within a large inductor. The two inductors may share a ground terminal, but are otherwise physically separated and independent from one another. Terminals of the inner inductor, for example, are not tapped from the outer inductor, which can reduce parasitic effects and electromagnetic interference relative to tapped inductor designs. The independence of the inductors also allows the different inductors to define different resonance frequencies, which is desirable.

Abstract: Systems and methodologies are described that facilitate throttling transmit power of a WWAN module based upon thermal input. For instance, the thermal input can be a detected temperature, a signal from a computing device associated with the WWAN module, a signal from an alternate technology module (e.g., WiFi module, WiMax module, . . . ) associated with the WWAN module, or the like. A target transmit power of the WWAN module can be reduced (e.g., by a predetermined amount, . . . ) upon occurrence of a condition (e.g., the detected temperature exceeding a threshold, the computing device or the alternate technology module requesting a decrease in thermal power, . . . ), for example. Moreover, negotiation between the WWAN module and a base station can be effectuated to select an appropriate class (power class or Multi Slot Class) and/or operating mode when the target transmit power of the WWAN module is altered.

Abstract: This disclosure describes a dual inductor circuit, which may be particularly useful in a mixer of a wireless communication device to allow the mixer to operate for two different frequency bands or in a multi-differential branch low noise amplifier wherein each of the differential branches possess a different set of gain and linearity characteristics for a signal operating at the same frequency. The dual inductor circuit comprises an inductor-within-inductor design in which a small inductor is disposed within a large inductor. The two inductors may share a ground terminal, but are otherwise physically separated and independent from one another. Terminals of the inner inductor, for example, are not tapped from the outer inductor, which can reduce parasitic effects and electromagnetic interference relative to tapped inductor designs. The independence of the inductors also allows the different inductors to define different resonance frequencies or gain and linearity characteristics, which is desirable.

Abstract: An adjustable filter is responsive to a control signal to change a frequency response of the adjustable filter based on at least one of a geographic location, frequency spectrum information, and a status of a secondary internal radio. The control signal may shift a center of the pass band from a first center frequency to a second center frequency and/or change a pass band bandwidth from a first bandwidth to a second bandwidth. A transmitter includes an adjustable filter responsive to a control signal and controller configured to select a frequency response of the adjustable filter by generating the control signal based on a geographical location. In one aspect, the geographical location indicates a region of operation of the receiver and the frequency response is selected in accordance with the region.

Abstract: A mobile communication device comprises a plurality of receivers, a phase detection circuit, and a DC offset calibration circuit. Each receiver comprises a receiver chain and a divide-by-2 circuit that supplies Local Oscillating (LO) signal for the receiver chain. The LO signals leak to each receiver chain and create an undesirable DC offset voltage. The DC offset depends on an LNA gain and a phase relation among the LO leakages. In a first novel aspect, a two-dimensional DC offset calibration (DCOC) table is prepared for each receiver chain. In a second novel aspect, the phase detection circuit detects the phase relation among the LO leakages for each receiver chain. Based on the LNA gain and the detected phase relation of each receiver chain, a DCOC code is selected from a corresponding DCOC table such that the calibration circuit calibrates the DC offset for each receiver effectively and efficiently.

Abstract: An adjustable filter is responsive to a control signal to change a frequency response of the adjustable filter based on at least one of a geographic location, frequency spectrum information, and a status of a secondary internal radio. The control signal may shift a center of the pass band from a first center frequency to a second center frequency and/or change a pass band bandwidth from a first bandwidth to a second bandwidth. A receiver includes an adjustable filter responsive to a control signal and controller configured to select a frequency response of the adjustable filter by generating the control signal based on a geographical location. In one aspect the geographical location indicates a region of operation of the receiver and the frequency response is selected in accordance with the region.

Abstract: An improved power amplifier system is provided. The power amplifier system includes a programmable digital filter and a power amplifier, each responsive to a plurality of frequency response settings and switching frequency settings, respectively. Each frequency response setting and switching frequency setting is adaptively selected by a processor device to match a bandwidth of an incoming audio signal. The processor device identifies the current bandwidth of an incoming audio signal and adaptively selects a switching rate setting and a frequency response setting based on the current bandwidth. The frequency response setting is selected so as to reduce noise fold over in the power amplifier for a corresponding bandwidth, sampling rate setting, and switching frequency setting.

Abstract: A wireless user equipment device transmits a control channel and a data channel. Each of the control channel and the data channel include a plurality of time slots. The control channel is configured to transmit control information and includes both transmission time slots and non-transmission time slots. The data channel is configured to transmit data packets. The device further includes a processor configured to schedule at least one data packet for transmission in at least one data channel time slot that is concurrent to at least one control channel transmission time slot, and a transmission module configured to transmit the at least one data packet in the at least one data channel time slot that is concurrent to the at least one control channel transmission time slot.

Abstract: Techniques for generating precise non-overlap time and clock phase delay time across a desired frequency range are provided. In one configuration, a device includes a non-overlapping clock generation circuit which comprises a delay lock loop (DLL) circuit that in turn generates a control voltage to a clock generator circuit coupled thereto. The control voltage operates to maintain precise timing relationship of non-overlapping delayed clock signals generated by the clock generator circuit. In one aspect, the DLL circuit receives an input clock with a known duty cycle and derives an output control voltage to fix the unit delay to a certain portion of the input clock cycle. In a further aspect, the clock generator circuit includes a plurality of voltage-controlled delay cells coupled to the DLL circuit to generate a first set of clock signals and a second set of clock signals delayed from the first set of clock signals by a non-overlapping time (tnlp) that is independent of manufacturing process variations.

Abstract: Techniques for reducing or eliminating DC (direct current) offset in transmitters are disclosed. An apparatus for DC offset reduction may include a converter, a digital engine, and a plurality of programmable current supplies. The converter is configured to provide digital representations of a plurality of DC currents associated, respectively, with a plurality of differential signal legs. The digital engine is configured to receive the digital representations and to produce instructions for generating compensating currents for the plurality of differential signal legs based on comparisons, respectively, between each of the digital representations and a calibration current. The programmable current supplies correspond, respectively, to the differential signal legs. The current supplies are configured to inject the compensating currents into the differential signal legs, respectively, to reduce DC offset between the differential signal legs, based upon the instructions.