Abstract: Even in the case of a full hang state where a command to reset software is entirely ineffective, memory dump can be stored even if there is no in-circuit emulator. An HDD itself monitors a command execution time, that is, the time between reception of a command from a host computer and completion of the process of the command. If the HDD judges that it has taken an abnormally long time, a memory dump will be automatically stored on a reserved area on a disk. The memory dump can be read out from the disk at any time so that an analysis can be made.

Abstract: The present system may be utilized to minimize access performance penalties in memory subsystems which utilize redundant arrays of disk memory devices. Redundant arrays of disk memory devices provide levels of reliability which are not available with single storage devices; however, the redundancy carries with it an access performance degradation due to the requirement that such systems write data segments and parity elements to the array each time an application updates data within the system. A large nonvolatile cache is therefore provided in association with a redundant array of disk memory devices. Each time a data segment is written or read the data segment is staged from the array to the nonvolatile cache, if the data segment is not already within the cache. Additionally, if the operation is an update, a parity element associated with the data segment to be updated is also staged to the cache with the existing data segment content.

Abstract: A fault tolerant disk storage subsystem which includes a multipath dynamically alterable hierarchical arrangement of storage device controllers. Multiple storage device controllers are provided which are each adapted to emulate a storage device and which each include a cache memory which has multiple data input ports and multiple data output ports. A processing element within the storage device controller is utilized to selectively interconnect particular data input ports with selected data output ports to provide multiple paths within the storage device controller. An interconnection is then provided for coupling a data output port of one or storage device controller with a data input port of one more alternate storage device controllers which emulate storage devices, creating an alterable hierarchical arrangement of storage device controllers. Storage devices are then coupled to each of the lowest levels of the hierarchical arrangement of storage device controllers.

Abstract: A method and system for automatically allocating space within a data storage system for multiple data sets which may include units of data, databases, files or objects. Each data set preferably includes a group of associated preference/requirement parameters which are arranged in a hierarchical order and then compared to corresponding data storage system characteristics for available devices. The data set preference/requirement parameters may include performance, size, availability, location, portability, share status and other attributes which affect data storage system selection. Data storage systems may include solid-state memory, disk drives, tape drives, and other peripheral storage systems. Data storage system characteristics may thus represent available space, cache, performance, portability, volatility, location, cost, fragmentation, and other characteristics which address user needs.

Abstract: The present application may be utilized for enhanced maintenance of data stored on storage media within a data processing system storage subsystem. Data to be stored is first subdivided into multiple blocks and subblocks, segments or tracks. Each subdivision of data is then analyzed and appropriate logical Error Correction Codes (ECC) are calculated and inserted into the data at selected locations to permit certain data errors to be corrected by subsequent processing. Thereafter, the data and associated logical Error Correction Codes (ECC) are then coupled to a head/disk assembly within a storage subsystem. A physical Error Correction Code (ECC) logic circuit is then utilized to analyze the data and logical Error Correction Codes (ECC) and appropriate physical Error Correction Codes (ECC) are then calculated and inserted into the data at selected locations in response to the storage of the data and logical Error Correction Codes (ECC) within the storage media.