Abstract: A circuit to implement a multi-channel parallel to serial conversion and a multi-channel serial to parallel conversion in one minimal RAM Matrix. The number of RAM cells (bits) needed is equivalent to the number of Flip-Flops used in a standard shift register and holding register implementation.
Type:
Grant
Filed:
March 28, 1996
Date of Patent:
July 20, 1999
Assignee:
National Semiconductor Corporation
Inventors:
Erik Rustan Swenson, Brian Charles Edem
Abstract: A current controlled oscillator circuit comprising a "variable-ratio current mirror", for providing a variable output current that varies in response to process. The "variable-ratio current mirror" having a reference MOS transistor and a mirrored MOS transistor, and the reference MOS transistor has a greater predetermined channel length than the channel length of the mirrored MOS transistor. A second current mirror is coupled to the "variable-ratio current mirror" to provide a control current that decreases in response to an increase in the variable output current of the "variable-ratio current mirror." A multi-stage ring oscillator having a plurality of series-connected inverter stages is responsive to the control current of said second current mirror for controlling the frequency of oscillation of said multi-stage ring oscillator.
Abstract: A process for forming a via in a semiconductor device using a self-aligned metal pillar to connect metal layers separated by a dielectric. A first aluminum layer is formed on an oxide layer overlying a semiconductor substrate, a titanium nitride layer is formed on the aluminum layer and finally a second aluminum layer is formed on the titanium nitride layer. In one continuous etching step, the stack of aluminum/titanium nitride/aluminum is then patterned and etched. A first dielectric is deposited overlying the exposed regions of the oxide layer and the formed metal stack. The wafer is then planarized exposing the top of the second aluminum layer. The wafer is again patterned and the second layer of aluminum is etched using the titanium nitride as an etch stop. A second dielectric is deposited to fill the resulting gaps and CMP processes are used to planarize the wafer and expose the top of the aluminum pillar.
Abstract: A microprocessor which has a secure read only memory is disclosed. The secure read only memory provides for storage of a program and security to protect that program.