Patents Represented by Attorney, Agent or Law Firm Eugene J. Bernard
  • Patent number: 6704730
    Abstract: A system and method for a computer file system that is based and organized upon hashes and/or strings of digits of certain, different, or changing lengths and which is capable of eliminating or screening redundant copies of aggregate blocks of data (or parts of data blocks) from the system. The hash file system of the present invention utilizes hash values for computer files or file pieces which may be produced by a checksum generating program, engine or algorithm such as industry standard MD4, MD5, SHA or SHA-1 algorithms. Alternatively, the hash values may be generated by a checksum program, engine, algorithm or other means that produces an effectively unique hash value for a block of data of indeterminate size based upon a non-linear probablistic mathematical algorithm.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: March 9, 2004
    Assignee: Avamar Technologies, Inc.
    Inventors: Gregory Hagan Moulton, Stephen B. Whitehill
  • Patent number: 6680248
    Abstract: A method of forming a dual damascene structure comprises the steps of providing a substrate having a first conductive layer formed thereon, and then sequentially forming a first dielectric layer, an anti-reflection layer and a second dielectric layer over the substrate. Next, the first dielectric layer, the anti-reflection layer and the second dielectric layer are patterned to form a first opening that exposes the conductive layer. Thereafter, the second dielectric layer is patterned to form a trench (or second opening) in a position above the first conductive layer. The trench and the first opening together form an opening of the dual damascene structure. Finally, a second conductive material is deposited into the opening and the trench to form conductive lines and the dual damascene structures.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: January 20, 2004
    Assignee: United Microelectronics Corporation
    Inventors: Yimin Huang, Tri-Rung Yew
  • Patent number: 6486040
    Abstract: A method of chemical-mechanical polishing for forming a shallow trench isolation is disclosed. A substrate having a number of active regions, including a number of relative large active regions and a number of relative small active regions, is provided. The method comprises the following steps. A silicon nitride layer on the substrate is first formed. A number of shallow trenches are formed between the active regions. An oxide layer is formed over the substrate, so that the shallow trenches are filled with the oxide layer. A partial reverse active mask is formed on the oxide layer. The partial rever active mask has an opening at a central part of each relative large active region. The opening exposes a portion of the oxide layer. The opening has at least a dummy pattern. The oxide layer on the central part of each large active region is removed to expose the silicon nitride layer. The partial reverse active mask is removed. The oxide layer is planarized to expose the silicon nitride layer.
    Type: Grant
    Filed: November 20, 2001
    Date of Patent: November 26, 2002
    Assignee: United Microelectronics Corporation
    Inventors: Coming Chen, Juan-Yuan Wu, Water Lur
  • Patent number: 6448159
    Abstract: A method of chemical-mechanical polishing for forming a shallow trench isolation is disclosed. A substrate having a number of active regions, including a number of relative large active regions and a number of relative small active regions, is provided. The method comprises the following steps. A silicon nitride layer on the substrate is first formed. A number of shallow trenches are formed between the active regions. An oxide layer is formed over the substrate, so that the shallow trenches are filled with the oxide layer. A partial reverse active mask is formed on the oxide layer. The partial rever active mask has an opening at a central part of each relative large active region. The opening exposes a portion of the oxide layer. The opening has at least a dummy pattern. The oxide layer on the central part of each large active region is removed to expose the silicon nitride layer. The partial reverse active mask is removed. The oxide layer is planarized to expose the silicon nitride layer.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: September 10, 2002
    Assignee: United Microelectronics Corporation
    Inventors: Coming Chen, Juan-Yuan Wu, Water Lur
  • Patent number: 6445444
    Abstract: A highly precise range measurement instrument is made possible through the use of a novel and efficient precision timing circuit which makes use of the instruments internal central processing unit crystal oscillator. A multi-point calibration function includes the determination of a “zero” value and a “cal” value through the addition of a known calibrated pulse width thereby providing the origin and scale for determining distance with the constant linear discharge of capacitor.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: September 3, 2002
    Assignee: Laser Technology, Inc.
    Inventor: Jeremy G. Dunne