Abstract: Methods for aiding in the diagnosis of dysautonomic disorders and dysautonomic conditions and methods for treating individuals diagnosed as having a dysautonomic disorder or a dysautonomic condition. In one aspect, a diagnosis method comprising analyzing a stool sample of an individual for the presence of a biological marker wherein the quantity of the biological marker is an indication of whether the invidual has, or can develop, a dysuatonic disorder or dysautonomic condition, as well as a therapuetic method for treating a dysautonomic disorder or dysautonomic condition by administration of, e.g., secretin, neuropeptides, peptides and/or digestive enzymes.
Abstract: An internal clock generating circuit of a semiconductor device includes: a delay chain having a plurality of delay units for generating multi-phase clocks by adjusting an input clock; a thermometer for outputting a thermometer code value in response to an input selection data; a multiplexer for selectively outputting one of a plurality of clocks input from the delay chain in response to the thermometer code value of the thermometer; and a pulse regenerator for outputting an adjusted internal clock by restoring a pulse form of the clock output from the multiplexer into its original state and controlling the delay thereof as much as desired.
Abstract: A filtering method and apparatus improve resolution of an ultrasound image in an ultrasound imaging system. The filtering method includes the steps of obtaining magnitude of at least one lateral direction signal component among ultrasound filed characteristics which lowers resolution of an image, using Fourier transform, and scaling a signal focused in a mainlobe direction according to a ratio between the magnitude of the obtained lateral direction signal component and that of the signal focused in the mainlobe direction. The filtering apparatus includes a lateral direction signal calculator and a filtering unit.
Abstract: A wafer cleaning apparatus for cleaning wafers for manufacturing semiconductor devices is provided. The wafer cleaning apparatus includes a chuck for chucking a wafer to be cleaned, means for rotating the wafer chucked by the chuck, a cleaning solution spray nozzle for spraying a cleaning solution toward the top surface of the wafer rotated by the rotating means, at least two brushes installed to be moved horizontally above the wafer with a predetermined distance spaced apart from the top surface of the wafer in a contact state with the sprayed cleaning solution, and brush moving means for selectively moving the respective brushes horizontally above the wafer, wherein distances between the top surface of the wafer and lower ends of the respective brushes are different from each other when the respective brushes clean the wafer as horizontally moving above the wafer.
Abstract: The present invention analyzes an application A and computes a set reachable methods in A by determining the methods in A that may be called from another reachable method in A, or from within a class library L used by A without analyzing the classes in L. The invention may be used as an optimization to reduce application size by eliminating unreachable methods.
Type:
Grant
Filed:
December 14, 1998
Date of Patent:
November 25, 2003
Assignee:
International Business Machines Corporation
Inventors:
David Francis Bacon, Johannes C. Laffra, Peter Francis Sweeney, Frank Tip
Abstract: A canine waste collection device comprising a handle and a frame member, connected to one end of the handle, wherein the frame member comprises a slotted member for insertably receiving and securing a portion of the disposable paper element, and wherein the frame member is configured for foldably receiving the disposable paper element to form a pouch for receiving waste.
Abstract: A semiconductor integrated circuit and a memory device capable of selecting power-down exit speed and power-save modes and method thereof are provided. The memory device includes a command decoder for generating a power-down signal in response to a power-down command, a mode register (MRS) for storing power-down exit information, a clock synchronization circuit such as a DLL or PLL circuit for generating an internal clock signal synchronized with an external clock signal, and a controller for controlling the DLL or PLL circuit. At power-down exit of the memory device, the power-down exit information can be selected between a fast wakeup time and a slow wakeup time.
Abstract: A Group Page process is implemented by which a variable audio source may be dynamically allocated circuit switch channels for broadcasting to a group of devices. The process is implemented via message exchanges between a Group Page Manager which accesses a data structure relating to the grouped devices, and a Paging Party Call Process associated with the party desirous of broadcasting an audio page.
Abstract: Disclosed is a method of protecting a semiconductor shallow trench isolation (STI) oxide from etching, the method comprising lowering, if necessary, the upper surface of said STI oxide to a level below that of adjacent silicon active areas, depositing a nitride liner upon said STI oxide and adjacent silicon active areas in a manner effective in defining a depression above said STI oxide, filling said depression with a protective film, and removing said nitride layer from said adjacent active areas.
Type:
Grant
Filed:
May 24, 2001
Date of Patent:
November 11, 2003
Assignee:
International Business Machines Corporation
Abstract: The present invention includes a flow conditioning apparatus for conditioning flow for accurate flow measurements. The flow conditioning apparatus is installed in a fluid stream to provide a flow pattern which is capable of flow measurement. In one embodiment, the flow pattern resembles plug flow or flat flow in a pipe. The apparatus for conditioning flow in a pipe, in accordance with the present invention, includes a centrally disposed hub with a plurality of angled members attached to the hub on at a first end portion of the angled members. The angled members include a second end portion extending radially outward from the hub. The second end portion of the angled members is attached to a ring such that the plurality of angled members cause a fluid to swirl within the pipe to condition a flow in the pipe.
Abstract: A palm PC dockable phone, comprising a personal computer running a software application for implementing telephony functions, a personal digital assistant (PDA) device providing a user display and input interface, and a telephone set connected to the personal computer and in communication with the PDA device, wherein the telephone set incorporates phone firmware for communicating with the software application and PDA firmware for communicating with the PDA device for controlling the telephony functions via the user display and input interface.
Type:
Grant
Filed:
February 10, 2000
Date of Patent:
November 11, 2003
Assignee:
Mitel Corporation
Inventors:
Debbie Pinard, Ed Bijman, Douglas C. Oddy
Abstract: A method for managing computer memory includes maintaining multiple sets of free blocks of memory wherein a free block is added to a set based on its size. In response to a request for a block of a request size, a set of blocks is searched for a free block which is at least as large as the request size but smaller than the request size plus a threshold. If such a block is found, the block is allocated in its entirety. If such a free block is not found, a block at least as large as the request size maybe split and the request satisfied with the resulting split block. Methods for managing a block of contiguous persistent memory or storage and for coalescing adjacent free blocks using header information are also described.
Type:
Grant
Filed:
February 15, 2000
Date of Patent:
November 4, 2003
Assignee:
International Business Machines Corporation
Inventors:
James R. H. Challenger, Arun K. Iyengar
Abstract: Disclosed is a method of protecting semiconductor areas while exposing a structures for processing on a semiconductor surface, the method comprising depositing a planarizing high density plasma film of a silicon compound, selected from the group silicon oxide and silicon nitride, depositing a planarized polymer film to a thickness effective in protecting said high density plasma film while leaving high density plasma excess exposed, and etching away said high density plasma excess.
Type:
Grant
Filed:
August 23, 2001
Date of Patent:
November 4, 2003
Assignee:
International Business Machines Corporation
Inventors:
Omer H. Dokumaci, Bruce B. Doris, Michael P. Belyansky
Abstract: A digital to analog converter having low power consumption is provided which includes a reference bias voltage generator for generating a predetermined bias voltage, and a conversion current generator having a plurality of current generators for supplying current which correspond to the bias voltage and a plurality of digital signals to an output terminal.
Abstract: A method of filling a contact hole of a semiconductor device preceded by dry cleaning for removing a damaged layer resulting from dry etching is provided. The method includes selectively exposing an underlying material layer by a dry etch and dry cleaning including passing plasma excited from a source gas over the exposed underlying material layer to remove the damaged layer formed from the dry etch. Subsequently, an electrically conductive layer with which to fill the contact hole is formed. The formation of the electrically conductive layer is performed in a separate chamber connected sequentially to a chamber for performing the dry cleaning to prevent the exposed underlying material layer inside the dry cleaned contact hole from being exposed to a source of contamination.
Abstract: A semiconductor memory device capable of improving common bus efficiency is disclosed. The device comprises an address shifting circuit for delaying an address by an n+m number of clock cycles in response to a clock signal, a control signal generating circuit for combining a column address strobe (CAS) latency of n-value and one of first and second operation signals to generate a control signal, and a switching circuit for outputting the address delayed by the n+m number of clock cycles output from the address shifting circuit in response to the control signal. The first operation signal indicates that the n-value of the CAS latency is less than a predetermined value and write latency is fixed. The second operation signal indicates that the n-value of the CAS latency is equal to or greater than the predetermined value and the write latency is variable.
Abstract: A synchronous DRAM and method are provided in which main cells and spare cells are accessed by an external address during automatic refresh of a test mode. In the synchronous DRAM, a mode register setting circuit receives an external signal in response to a plurality of control signals to generate a mode register setting signal, during an automatic refresh operation in a test mode. An address selector selects and outputs an external address to the memory cell array, in response to the activation of the mode register set signal, during the automatic refresh operation in the test mode. The address selector selects and outputs an internal address to the memory cell array, in response to the deactivation of the mode register set signal, during an automatic refresh operation in a normal mode. Therefore, the main cells and the spare cells in the memory cell array are sequentially accessed and refreshed by the external address during the automatic refresh operation in the test mode.
Abstract: A method of utilizing the chymotrypsin level of an individual as a measure of the success of secretin, other neuropeptides, and peptides or digestive enzyme administration to such individuals, and in particular, as a prognosticative of potential secretin, other neuropeptides, peptides, and digestive enzyme administration for persons having ADD, ADHD, Autism and other PDD related disorders.
Abstract: In accordance with the present invention, a method for selecting a channel and delivery time for digital objects for a broadcast delivery service including multiple channels of varying bandwidths includes the steps of selecting digital objects to be sent over the multiple channels, generating a schedule and pricing for the digital objects based on the digital object selected and existing delivery commitments and manipulating the schedule and pricing to provide a profitable delivery of the digital objects. A system is also included.
Type:
Grant
Filed:
January 28, 1999
Date of Patent:
October 7, 2003
Assignee:
International Business Machines Corporation
Inventors:
Charu C. Aggarwal, Joel L. Wolf, Philip S. Yu
Abstract: There is provided a method for laying out objects corresponding to an object-oriented application. The method including the step of determining whether any two given objects have opposing directionalities. A virtual function table pointer is shared between the two given objects, and the directionalities of the two given objects are changed to mixed, when the two given objects have opposing directionalities.
Type:
Grant
Filed:
October 22, 1999
Date of Patent:
October 7, 2003
Assignee:
International Business Machines Corporation
Inventors:
Joseph Gil, Peter F. Sweeney, Mark N. Wegman