Abstract: A pulse signal conditioner filters and equalizes signal pulses representing digital data whether or not obtained from a magnetic recording device. Modified low pass filters filter the pulse signals and also derive and feed forward the second time derivative of the filtered pulse signals. The filtered pulse and the second time derivative thereof are combined to slim the pulse. Further slimming is provided by delay line equalizers having three paths. A first path for attenuating the pulse signals, a second path for delaying the pulse signals for a first delay, and a third path for delaying the pulse signals for a second delay and attenuation. Pulse signals from the three paths are combined to further slim the pulse.

Abstract: An amplifier for voltage biasing and amplifying the signals produced by a magnetic sensor is provided. Electrically, the resistance of the sensor is disposed between the bases of a differential pair comprising the input stage of the amplifier. Constant bias voltage for the sensor is provided independently of sensor resistance. DC feedback to the input stage balances current flow in both paths of the differential input stage to correct for DC offset arising in the output from input stage emitter resistor. The amplified signal, representing .DELTA.R.sub.h /R.sub.h, is sensed as a voltage across the magnetoresistive sensor, where .DELTA.R.sub.h is the change in steady-state resistance, R.sub.h, of the sensor.

Abstract: In the readback apparatus of magnetic recording system operating in accordance with the partial-response maximum-likelihood (PRML) technique, a variable-gain amplifier (VGA) and a maximum-likelihood sequence detector (ML DET) plus a gain control loop are provided. The detector (19) is designed to operate on input signals (y') having nominal discrete signal amplitudes (a, 0, -a) and it furnishes discrete output signals (y) having such nominal signal amplitudes. The gain control loop is responsive to input (27) and output (29) signals of the detector, and it has charge-pump circuitry (37, 39, 41, 43) for generating a gain control signal (V.sub.c =V.sub.g) for the variable gain amplifier (35).

Abstract: A system for controllably varying the width of the data window in a magnetic storage device to perform comparative data detection error rate measurements thereon is provided. The system generates the programmably and continuously variable stressed data window symmetrically within, and in locked phase with, the full data window under the control of a single current DAC in the VCO of the device.

Abstract: Process and structure for semiconductor chip capacitors having high capacitance with variations in applied voltage without adding process steps to fabricate same.

Abstract: Method and apparatus for magnetoresistive (MR) head biasing and output signal detection for reading data recorded in magnetic media. The MR head may be biased by constant current or constant voltage, and an output signal, proportional to the ratio of the instantaneous value of the change in MR head resistance to total MR head resistance when exposed to the magnetic field of the media, is detected.

Abstract: Rate 8/9, constrained codes having run length limitation parameters (0, 4/4) and (0, 3/6) are provided for any partial response (PR) signalling system employing maximum likelihood (ML) detection.

Abstract: A system for correcting errors in data read from a direct access storage device employs an extendable, two-level coding scheme having n subblocks in a relatively long variable-length block of data, each subblock having up to m bytes of data. At the subblock level, decoding capability provides correction of up to t.sub.1 errors and detection of up to t.sub.1 +c errors in each subblock, while the block-level decoding capability provides correction of up to t.sub.2 errors in any one of the subblocks. The combined capability of the system corrects any combination of (t.sub.1 +x) errors in one subblock, and up to t.sub.1 errors in any or all of the other subblocks in the block, where x is a non-negative integer such that (t.sub.1 +x).ltoreq.t.sub.2 and x<c. The combined capability of the system also provides correction of any combination of (t.sub.1 +x) errors in one subblock and up to (t.sub.1 +C-x) errors in any or all of the other subblocks in the block, where x is an integer such that (t.sub.1 +x).ltoreq.

Abstract: A transimpedance amplifier for biasing and amplifying the signals produced by a magnetoresistive element is provided. Electrically, the resistance of the element is disposed as degenerative feedback in the emitter circuit of a differential pair comprising the input stage of the amplifier. Bias current for the element is supplied by the same current source that supplies current to the differential pair. DC feedback to the input stage balances current flow in both paths of the differential input stage to correct for DC offset arising in the output from variations transistor characteristics and the steady-state value of the magnetoresistive element. The amplified signal, representing .DELTA.R.sub.h /R.sub.h, is sensed as a current through the magnetoresistive element, where .DELTA.R.sub.h is the change in steady-state resistance, R.sub.h, of the element.

Abstract: Improved design, computation and implementation of pairs of error detection check bytes, where such bytes are appended to the end of a variable length record for data integrity check of the entire record after ECC correction, is provided. The error detection check bytes are each computed using different powers of the same companion T matrix of a degree-eight primitive polynomial used for computing associated ECC check bytes. Use of the same T matrix provides the computational convenience of a reasonable size Galois field of GF(2.sup.8), while providing long cycle length through a recurring offset within the data sequences corresponding to two members of each pair.

Abstract: A signal receiver having a frequency selective sampling detector which accepts a bandlimited analog signal and outputs uniformly spaced, digital samples of the signal's quadrature and in-phase components. The center frequency, phase reference and sample interval for the detector are derived from a single reference clock. The bandwidth of the detector is variable while maintaining the same center frequency.

Abstract: A method and device for detecting a narrow acoustic spectral feature in a sample as described. The method uses an electrical frequency modulated (FM) signal that is obtained from a voltage controlled oscillator. The Fourier spectrum of this wave is a main frequency f.sub.c with two small sidebands at frequencies f.sub.c .+-.f.sub.s. This whole triplet is slowly swept in frequency by a slow sawtooth generator. The electrical signal is fed into a flat acoustic transducer; the acoustic wave is then transmitted through an acoustically active medium, i.e. the sample, and detected by another flat acoustic transducer which produces an FM signal with a superposed amplitude modulated (AM) signal if one of the sidebands overlaps an acoustic feature. This electrical signal is then demodulated to give a pure AM signal which can be phase sensitive detected by using a lock-in amplifier.

Abstract: A transistor array arrangement for providing high-density semiconductor logic circuits in double polysilicon technology is described. Semiconductor, for example, FET, logic circuits have four independent but simultaneously accessible FET devices which are formed by intersecting sets of polysilicon gate lines. The four FET devices share a common first diffusion, for example a source, surrounded by four logically independent second diffusions, for example drains. A three-bit decode device is made which includes this array design.

Abstract: A rotatable polarized signal receiver, having a rectangular waveguide orthogonally coupled to a circular waveguide, has a receiver probe portion oriented in the circular waveguide and a signal launch probe portion extending into the rectangular waveguide. A dielectric insert located in the circular waveguide transforms circularly polarized signals to linearly polarized signals. Since the receiver probe portion can be rotated right circular or left circular polarization can be selected and received.

Abstract: A protective passivation structure is provided for a thermal ink jet printing head which employs a resistive heating element formed of phosphorus-diffused silicon. The passivation structure includes a layer of silicon nitride over the heating element with a layer of silicon carbide over the silicon nitride layer. The nitride exhibits good adhesion to the underlying silicon as well as good thermal conductivity. The carbide has exceptionally good wear and hardness qualities against ink bubble cavitation as well as adhering well to the nitride.

Abstract: A circuit for varying the power supplied from a D.C. power supply to a moderate to high powered load such as a motor is disclosed. Trapezoidal voltage and current waveforms are used approaching the maximum load power delivery available from sine wave drives and the minimum dissipation in the driver circuitry available with square wave drives, while at the same time minimizing the generation of undesirable electromagnetic interference (EMI).

Abstract: A method and means is disclosed for restoring the direct-current component of a signal read from a storage medium in the form of isolated analog signals which are simultaneously applied to a differentiator and a binary signal generator. The positive pulses of the analog signals trigger the binary signal generator that produces binary signals which initiate and terminate offset signals provided by an offset signal generator. An offset signal is summed differentially with the differentiated analog signal, providing a reconstructed signal which is applied to a zero-crossing detector which produces an output that is either a logical high or low, and that is capable of being processed by digital techniques. The positive-going transitions in the binary signal are equivalent to level transitions of an originally recorded signal.

Abstract: A module for dust-free containment of rotating data storage media such as disc packs, both in and out of the drive, including top and bottom covers, sliding door access for read/write heads and filtered air, a carrying handle coupled to the media hub for carrying the module and for locking the media in a fixed position within the module while being transported, and a removable chuck plate cover for covering a magnetic chuck plate and for locking the media in a fixed position within the module while being stored.

Abstract: The present invention provides a real-time fault-tolerant hardware error correction device which is typically implemented as a data transfer circuit between a disc memory and a processing unit. It operates in two modes: as an encoding system and error detector on a disc write, and as a decoding system and error corrector on a disc read. In its first mode, each block of data from the processing unit is encoded with an error syndrome as it is transmitted to the disc memory. Two identical linear feedback shift registers (LFSR's) are used for error detection purposes. In its second mode, the same two LFSR's are implemented with a buffer memory to achieve real-time error correction. Data flow to the LFSR's from the disc memory is alternated block-by-block, one block being received by one LFSR and the succeeding block being received by the other LFSR. At the same time that data is channeled to a particular LFSR, it is channeled synchronously to the buffer memory.

Abstract: Method and apparatus for starting and driving a brushless DC motor and compensating variations in motor speed by producing sequential drive currents through the motor coils, selectively interrupting such currents to allow the rotor to catch up with the rotating stator field during startup, and stabilizing motor speed by controlling motor coil current in inverse proportion to the rate of change of phase lag of the rotor behind the rotating stator field.