Patents Represented by Attorney, Agent or Law Firm Felsman, Bradley, Gunter & Dillon
  • Patent number: 5878229
    Abstract: A sequence in which two or more of the data units enter the network node, via a specific one of the multiple ports, is recorded. And, the two or more of the data units are transmitted from the network node according to the recorded sequence. The method and system achieve the recording of sequence via the following. In response to an insertion of one of the two or more data units into a specific one of the multiple processor subsystems, the specific one of the multiple processor subsystems is associated with a specific one of the multiple ports by which the one of the two or more data units entered the network node, and any other of the multiple processor subsystems that are currently processing on any other of the two or more data units that entered the network node through the specific one of the multiple ports is noted.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: March 2, 1999
    Assignee: International Business Machines Corporation
    Inventors: Brian M. Bass, Edward Hau-chun Ku, Scott J. Lemke, Joseph M. Rash, Loren Blair Reiss
  • Patent number: 5877094
    Abstract: A method for fabricating a silicon-on-sapphire wafer for processing by silicon-wafer-processing equipment. A layer is deposited on a backside of a silicon-on-sapphire wafer, the layer having optical and electrical properties of silicon, wherein the silicon-on-sapphire wafer may be sensed by a sensor designed to sense a presence of a silicon wafer.
    Type: Grant
    Filed: April 7, 1994
    Date of Patent: March 2, 1999
    Assignee: International Business Machines Corporation
    Inventors: James L. Egley, George M. Gut, Daniel J. Koch, Michael A. Matusewic
  • Patent number: 5875345
    Abstract: Disclosed is an information processing system that can operate in at least two modes of power management, a normal mode and a suspend mode. The system can enter the suspend mode in response to the expiration of an inactivity suspend timer and can resume therefrom in response to a resume request. While resuming, the system is operative to measure an elapsed time between entering the suspend mode and resuming therefrom. The system is further operative during the resume to either (1) prompt a user to enter a password if the elapsed time is longer than a predetermined time or (2) skip (1) and not prompt a user to enter a password if the elapsed time is shorter than the predetermined time. The system decreases the amount of time required to resume from a power saving mode by not requiring a password input when a resume request by a user, such as key input, occurs within a relatively short period of time after the system entered the suspend mode.
    Type: Grant
    Filed: June 28, 1996
    Date of Patent: February 23, 1999
    Assignee: International Business Machines Corporation
    Inventors: Arimasa Naito, Takahide Wada
  • Patent number: 5874360
    Abstract: A method of fabricating a tungsten contact in a semiconductor device, the method including the steps of: (a) providing a silicon wafer structure including a dielectric layer and an underlying layer selected from a semiconductor or electrically conductive material, the dielectric layer being patterned to expose a contact portion of the underlying layer; and (b) depositing by chemical vapor deposition a tungsten layer over the dielectric layer and the contact portion, the deposition being carried out by reaction of a tungsten-containing component and a reducing agent which are introduced into the vicinity of the silicon wafer structure, the deposition step having a first phase in which the process conditions are controlled to form a seed layer of tungsten on the dielectric layer and a second phase in which the process conditions are modified from the first phase to form a blanket tungsten layer over the seed layer which acts as an adhesion layer between the dielectric layer and the blanket tungsten layer.
    Type: Grant
    Filed: April 24, 1995
    Date of Patent: February 23, 1999
    Assignee: SGS-Thomson Microelectronics Limited
    Inventors: Graeme Michael Wyborn, Christopher McGee, Howard Charles Nicholls
  • Patent number: 5858119
    Abstract: A method for cleaning ion exchange resins. The ion exchange resin is circulated by a circulating medium within a circulation, system. The concentration of ions within a circulation medium is periodically changed at a selected point in the circulation system to change the amount of solution within the ion exchange for a period of time such that the amount of solution within the ion exchange resin fluctuates as the ion exchange resin circulates within the circulating system. The degree of cleaning of the resin an the quantity of chemicals required are both improved. Additionally, the ion exchange resin may be agitated for further cleaning.
    Type: Grant
    Filed: May 17, 1995
    Date of Patent: January 12, 1999
    Inventor: Michael D. Mayne
  • Patent number: 5851871
    Abstract: A process for manufacturing integrated capacitors in CMOS technology, comprising the steps of: producing, in a substrate of semiconductor material having a first type of conductivity, at least one well with the opposite type of conductivity, defining the active areas, producing insulation regions, depositing a first conducting layer of polycrystalline silicon adapted to form the gate regions and the lower plates of the capacitors, depositing a layer of silicon oxide at low temperature, to form the dielectric of the capacitors, depositing a second layer of polycrystalline silicon to form the second plate of the capacitors, shaping the polycrystalline silicon and silicon oxide layers, implanting and diffusing the source and drain regions of the CMOS transistors, providing the insulation layer, the metallic connecting layer, and final covering with a layer of protective insulation.
    Type: Grant
    Filed: July 3, 1996
    Date of Patent: December 22, 1998
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventor: Danilo Re
  • Patent number: 5838049
    Abstract: A semiconductor device comprising a silicon substrate, an oxide layer on the silicon substrate, a doped polysilicon region disposed on the oxide layer, a dielectric layer which has been deposited over the doped polysilicon region and the silicon substrate, a contact hole which is formed in the dielectric layer and extends over respective laterally adjacent portions of the doped polysilicon region and the silicon substrate and a contact which has been selectively deposited in the contact hole which electrically connects the said portions together.
    Type: Grant
    Filed: May 31, 1996
    Date of Patent: November 17, 1998
    Assignee: SGS-Thomson Microelectronics, Ltd.
    Inventors: Howard Charles Nicholls, Michael John Norrington
  • Patent number: 5835705
    Abstract: A method and system for performance monitoring within a multithreaded processor are provided. The system includes a processor responsive to instructions within first and second threads and a performance monitor that separately records a first event generated by the processor in response to the first thread and a second event generated by the processor in response to the second thread. In one embodiment, the processor has first and second modes of operation. In this embodiment, when the performance monitor is operating in the first mode, a first counter within the performance monitor increments in response to each occurrence of the first event and a second counter within the performance monitor increments in response to each occurrence of the second event. Alternatively, when the performance monitor is operating in the second mode, the first counter increments in response to each occurrence of the first event and in response to each occurrence of the second event.
    Type: Grant
    Filed: March 11, 1997
    Date of Patent: November 10, 1998
    Assignee: International Business Machines Corporation
    Inventors: Troy Dale Larsen, Jack Chris Randolph, Andrew Henry Wottreng
  • Patent number: 5834860
    Abstract: An output driver circuit comprises a plurality of parallel pull up and pull down circuits each comprising at least one transistor switch switchable between on and off states and circuitry operable to maintain a desired resistance in the circuit when the transistor switch is switched on, and switch actuating circuitry including time delay circuitry for effecting a sequence of transistor switching operations in said pull-up and pull-down circuits with a time delay between successive operations, each operation effecting simultaneous switching of a transistor in one pull-up circuit and one pull-down circuit, whereby the output impedance is stabilised during a change in signal on the output terminal.
    Type: Grant
    Filed: May 1, 1995
    Date of Patent: November 10, 1998
    Assignee: SGS-Thomson Microelectronics Ltd.
    Inventors: Brian Jeremy Parsons, Robert John Simpson
  • Patent number: 5831607
    Abstract: A screen conversion mechanism is disclosed that converts character-based data information from multiple screens to graphical-based data information for display in a single graphical panel. The screen conversion mechanism allows the functions and options available in character-based applications, typically located on a host system and often across several screens, to be converted on the fly for display on graphical-based user terminal. The single graphical panel allows the user to access all functions or options.
    Type: Grant
    Filed: January 25, 1996
    Date of Patent: November 3, 1998
    Assignee: International Business Machines Corporation
    Inventor: Arthur Phillip Brooks
  • Patent number: D400244
    Type: Grant
    Filed: January 3, 1997
    Date of Patent: October 27, 1998
    Assignee: Quorum International
    Inventor: William S. Davis, Jr.
  • Patent number: D400294
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: October 27, 1998
    Assignee: Quorum International
    Inventor: Luis Esteban Lopez Fraile
  • Patent number: D400591
    Type: Grant
    Filed: September 26, 1997
    Date of Patent: November 3, 1998
    Assignee: Artistic Plastics & Fixtures, Inc.
    Inventor: Glenn D. Weatherby
  • Patent number: D401824
    Type: Grant
    Filed: September 17, 1996
    Date of Patent: December 1, 1998
    Inventor: Sergio Galvan
  • Patent number: D402660
    Type: Grant
    Filed: December 30, 1997
    Date of Patent: December 15, 1998
    Assignee: International Business Machines Corporation
    Inventor: John David Swansey
  • Patent number: D402699
    Type: Grant
    Filed: February 12, 1998
    Date of Patent: December 15, 1998
    Inventor: Michael D. Calhoon
  • Patent number: D403464
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: December 29, 1998
    Assignee: Quorum International
    Inventor: Luis Esteban Lopez Fraile
  • Patent number: D405217
    Type: Grant
    Filed: July 11, 1997
    Date of Patent: February 2, 1999
    Assignee: Davoil, Inc.
    Inventor: Francisco Planells Joli
  • Patent number: D405914
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: February 16, 1999
    Assignee: Quorum International
    Inventor: Luis Esteban Lopez Fraile
  • Patent number: D405915
    Type: Grant
    Filed: July 10, 1997
    Date of Patent: February 16, 1999
    Assignee: Quorum International
    Inventor: Luis Esteban Lopez Fraile