Patents Represented by Attorney, Agent or Law Firm Felsman, Bradley, Gunter & Dillon
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Patent number: 5449936Abstract: A high current MOS transistor integrated bridge structure includes at least two arms, each having a first and a second MOS transistor. The structure is formed on an N++ substrate forming a positive potential output terminal, and an N-type epitaxial layer. For each first transistor, an L shaped region is formed of a horizontal N+ region which is connected to the surface through an N++ vertical region. Forming a corresponding alternating current input with this region is an N type region which has within it a succession of P type regions, and a pair of N+ type regions forming a negative potential output terminal. For each second transistor, an N+ region has N++ lateral regions extending to the surface, and includes an N type region containing a succession of P type regions and a pair of N+ regions forming corresponding alternating current inputs. The first transistor of each arm is entirely contained within a P type isolation region which has P+ regions extending to the surface of the substrate.Type: GrantFiled: September 21, 1994Date of Patent: September 12, 1995Assignees: SGS-Thompson Microelectronics Srl, Consorzio per la Ricerca Sulla Microelectronics nel MezzogiornoInventors: Mario Paparo, Natale Aiello
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Patent number: 5446411Abstract: Apparatus for setting up the tuning frequency of a phase locked loop is provided which utilises the voltage controlled oscillator of the phase locked loop itself. The apparatus includes signal translation circuitry which can provide a control voltage to the VCO of the phase locked loop dependent on a tuning voltage which is alterable in response to the frequency of the signal output by the VCO.Type: GrantFiled: December 30, 1993Date of Patent: August 29, 1995Assignee: SGS-Thomson Microelectronics LimitedInventors: Wayne L. Horsfall, Gary Shipton
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Patent number: 5444291Abstract: An integrated bridge device includes at least two arms, each of which is formed of a first and second diode connected transistor in series. The device is formed in an N+ substrate, which forms a positive output terminal. N- and N type epitaxial layers are formed over the substrate, and P and P+ regions are formed therein for each of the aforesaid arms. An N type region is contained within the P and P+ regions, and in turn contains a P type region forming a negative potential output terminal. Also included in the N type region are N++ regions capable of minimizing the current gain of parasitic transistors formed within the device.Type: GrantFiled: November 20, 1992Date of Patent: August 22, 1995Assignee: Consorzio per la Ricerca Sulla Microelettronica Nel MezzogiornoInventors: Mario Paparo, Natale Aiello
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Patent number: 5432376Abstract: The base region of the power stage and the horizontal isolation region of the integrated control circuit or collector region of a transistor of an integrated circuit consist of portions of an epitaxial layer with a first conductivity type grown in sequence on an underlying epitaxial layer with a second conductivity type opposite the first.Type: GrantFiled: April 16, 1992Date of Patent: July 11, 1995Assignee: Consorzio per la Ricera Sulla Microelettronica Nel MezzogiornoInventor: Raffaele Zambrano
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Patent number: 5430388Abstract: A switching circuit for an FET transistor includes a controlled current circuit coupled to the gate of the FET. The input to the controlled current circuit represents a desired rate of change of gate voltage of the FET and is generated by a circuit responsive to the average specific transconductance of two FETs of similar specific transconductance operating at different drain circuit densities.Type: GrantFiled: June 11, 1993Date of Patent: July 4, 1995Assignee: Inmos LimitedInventors: Andrew M. Hall, Trevor K. Monk
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Patent number: 5430802Abstract: A speaker system includes a controller for driving a loudspeaker. The controller includes a sensor for detecting the present physical position of the speaker. The controller receives this position data as input, along with an audio signal to be reproduced. Using the audio signal as position data, the controller compares it with the actual sensed position data and generates an error signal. An error amplifier uses this error signal to drive the speaker, so that the speaker cone position matches the audio position defined in the audio data. In this manner, the speaker is driven by the error signal rather than the audio signal. In a preferred embodiment, the audio signal and position data are provided as digital signals, and the controller calculates the error signal in a digital signal processor.Type: GrantFiled: June 24, 1992Date of Patent: July 4, 1995Inventor: Steven L. Page
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Patent number: 5426264Abstract: An electrical cable for use in submersible well pumps in oil and gas well environments is provided having an electrical conductor core which is surrounded by an insulating layer of cross-linked polyethylene. A barrier layer surrounds the cross-linked polyethylene insulating layer. The barrier layer is impermeable to oil and other liquid hydrocarbons, but is permeable to low molecular gases. The barrier layer is preferably formed from a fluoropolymer and is surrounded by a polymeric protective layer. An adhesive layer attaches the barrier layer to the insulating layer.Type: GrantFiled: January 18, 1994Date of Patent: June 20, 1995Assignee: Baker Hughes IncorporatedInventors: David W. Livingston, David H. Neuroth, David G. Korte
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Patent number: 5424665Abstract: A driving circuit is provided for a power transistor connected to an inductive load. A detection resistor is placed between ground and the emitter of the power transistor. The driving circuit has a first portion which is capable of generating a first current which is a non-linear function of the voltage across the detection resistance. A second portion of the driving circuit is used to generate a base current for the power transistor that is proportional to the first current. The non-linear function of the first current compensates for the non-linear gain with respect to collector current of the power transistor.Type: GrantFiled: May 21, 1992Date of Patent: June 13, 1995Assignee: Consorzio Per La Ricerca Sulla Microelettronica Nel MezzogiornoInventors: Stefano Sueri, Sergio Palara
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Patent number: 5416411Abstract: A system is provided for measuring the thickness of a ferromagnetic layer formed over a conductive base layer. An eddy current probe is provided for measuring the thickness of the ferromagnetic layer. The eddy current probe can be placed in direct contact with the ferromagnetic layer, or it may be spaced above its surface by an unknown standoff distance. This spacing may be caused by the presence of an overlying nonferrous, nonconductive layer applied over the ferromagnetic layer, or it may be an air gap over the ferromagnetic layer. An analog detector connected to the probe provides output values in two dimensions corresponding to the modulation of the probe's magnetic field by the ferromagnetic and conductive layers. These values are utilized to determine a mapping between the detector output values and ferromagnetic layer thickness and standoff values. The output of the mapping function provides two values, a ferromagnetic layer thickness and a standoff distance, which corresponds to the detected values.Type: GrantFiled: January 8, 1993Date of Patent: May 16, 1995Assignee: Lockheed Fort Worth CompanyInventor: Dirk A. Elsmore
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Patent number: 5414217Abstract: An electrical cable for a submersible well pump is provided which is resistant to attack by hydrogen sulfide and which is less susceptible to damage from expanding gases during decompression. The electrical cable has a central copper conductor core. The conductor core is surrounded by a layer of electrical insulation material of either thermosetting or thermoplastic material. Surrounding the insulation material is a polymeric, low permeable layer having a hydrogen sulfide permeability rate which is substantially lower than the insulation material. A metal tape layer, such as lead tape, surrounds the low permeable layer. One or more conductor cores together with the insulation, low permeable layer and metal tape layer can be embedded in an elastomeric jacket and provided with an outer metal armor to provide a single electrical cable.Type: GrantFiled: September 10, 1993Date of Patent: May 9, 1995Assignee: Baker Hughes IncorporatedInventors: David H. Neuroth, Thomson H. Wallace
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Patent number: 5412368Abstract: A method of comparing a first multibit digital signal with a second multibit digital signal wherein to increase speed of obtaining an output signal said method comprises inputting input signals for each of said first and second signals and forming a respective codeword for each input signal, each codeword being at least one bit longer than the respective input signal and formed by the same error correcting code for both signals to provide increased minimum Hamming distance for the respective codewords, comparing respective bit locations of the codewords to form a plurality of match indicating signals for respective bit locations thereby indicating any mismatch by a mismatch at at least two bit locations, supplying said match indicating signals in parallel to gating circuitry arranged to provide an output indicating a match or mismatch between said codewords, said output being provided with a time delay less than that required for a single bit mismatch.Type: GrantFiled: June 29, 1993Date of Patent: May 2, 1995Assignee: Inmos LimitedInventors: Richard J. Gammack, Catherine L. Barnaby, Anthony I. Stansfield
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Patent number: 5408434Abstract: A programmable logic device is disclosed which can be used either as a look-up table logic device or as a logic function generator. This enables combinations to be provided such as the combination of a look-up table with a fixed gate field programmable gate array.Type: GrantFiled: February 3, 1994Date of Patent: April 18, 1995Assignees: Inmos Limited, Chancellor, Masters and Scholars of the University of OxfordInventor: Anthony I. Stansfield
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Patent number: 5394465Abstract: A parallel phone detection circuit is described, the function of which is to enable a phone call to be transferred from a first telephone set to a second telephone set. The detection circuit maintains the first telephone set connected to the telephone line until the handset of the second telephone set has been taken off-hook, and then disconnects the first telephone set. The circuit operates by detecting the line current from the telephone line and produces the reference value for comparison purposes related to that line current.Type: GrantFiled: January 28, 1993Date of Patent: February 28, 1995Assignee: SGS-Thomson Microelectronics, Pte Ltd.Inventor: Sung J. Jo
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Patent number: 5387537Abstract: A process for manufacturing isolated semiconductor components in a semiconductor wafer of the type used in bipolar technology. In this process, polycrystalline silicon is deposited in a recess in a silicon substrate whose walls are insulated by a silicon nitride layer except for an opening formed in this nitride layer at the bottom of said recess. Then, the polycrystalline silicon is recrystallized so as to become monocrystalline silicon by thermal heating from the "nucleus" formed by the underlying silicon in said opening.Type: GrantFiled: August 20, 1992Date of Patent: February 7, 1995Assignee: Soclete pour I'Etude et al Fabrication de Circuits Integres Speciaux E.F.C.I.S.Inventor: Joseph Borel
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Patent number: 5384430Abstract: A cable for a submersible pump has three insulated power conductors assembled in a flat configuration. The power conductors are wrapped with an inner armor such as a metal strip. An auxiliary line is placed alongside the inner armor and wrapped in an outer armor. The outer armor is also a metal strip.Type: GrantFiled: May 18, 1993Date of Patent: January 24, 1995Assignee: Baker Hughes IncorporatedInventors: Roger B. Anthony, David H. Neuroth
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Patent number: 5382837Abstract: A circuit for connecting a first circuit node to either a second or a third circuit node relative to the voltage potential on the third circuit node includes two bipolar transistors connected in series. The collectors of both transistors are connected to the first circuit node. The emitter of the first transistor is connected to the second circuit node and the emitter of the second transistor is connected to the third circuit node. Means are provided for maintaining the base of the second transistor at a constant, preset bias voltage.Type: GrantFiled: June 23, 1992Date of Patent: January 17, 1995Assignee: Consorzio per la Ricerca Sulla Microelecttronica nel MezzogiornoInventors: Natale Aiello, Sergio Palara
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Patent number: 5382538Abstract: The process provides first for the accomplishment of low-doping body regions at the sides and under a gate region and then the accomplishment of high-doping body regions inside said low-doping body regions and self-aligned with said gate region. There is thus obtained an MOS power transistor with vertical current flow which has high-doping body regions self-aligned with said gate region and with a reduced junction depth.Type: GrantFiled: May 21, 1993Date of Patent: January 17, 1995Assignees: Consorzio per la Ricerca Sulla Microelectronica nel, SGS-Thomson Microelectronics S.R.L.Inventors: Raffaele Zambrano, Carmelo Magro
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Patent number: 5381044Abstract: In accordance with the present invention, the above and other objects and advantages are obtained with a bootstrap circuit for a power MOS transistor in a high side configuration. Such circuit includes a first capacitor chargeable to a first voltage which is a function of the supply voltage of the power transistor. It further includes a second capacitor combined with the first capacitor so as to provide a second voltage which is higher than the first voltage and the threshold voltage of the power transistor.Type: GrantFiled: July 22, 1992Date of Patent: January 10, 1995Assignees: Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, SGS-Thomson Microelectronics s.r.lInventors: Michele Zisa, Massimiliano Belluso, Mario Paparo
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Patent number: 5379479Abstract: A handle attached to a spreader blade housing. The housing supports a spreader blade which spreads the adhesive over a desired surface. The angle of the handle is preferably adjustable relative to the housing. Weights are added to the housing to apply a downward force to the spreader blade, so that a downward force need not be applied through the handle by an operator. The weights are preferably removable, allowing the weight applied to the spreader blade to be adjusted to compensate for different viscosities of adhesive and different application speeds.Type: GrantFiled: December 31, 1992Date of Patent: January 10, 1995Inventor: Jim L. Nelson
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Patent number: 5360076Abstract: An improved rigid face seal that minimizes pressure fluctuations in the lubricant in the vicinity of the seal assembly. The assembly has a first ring with a radial seal face that opposes and engages an opposed radial seal face of a second rigid ring. A first resilient energizer ring is compressed between opposed, generally conical surfaces, one on the first rigid seal ring and the other in a shaft seal groove. The mid-section of the first energizer ring is positioned relative to the journal bearing surface such that its inner periphery is inside the journal bearing surface and thereby defines an essentially constant, lubricant-filled volume between the seal assembly and the shaft seal groove--even as the cutter and seal assembly move relative to the shaft during drilling. A second energizer ring is provided to maintain sealing engagement between the radial seal faces of the first rigid ring and the second rigid ring.Type: GrantFiled: April 3, 1992Date of Patent: November 1, 1994Assignee: Hughes Tool CompanyInventors: Joseph L. Kelly, Jr., Michael F. Welsh