Patents Represented by Law Firm Felsman, Bradley & Gunter
  • Patent number: 5653020
    Abstract: The invention relates to a method for forming a plastic package for an integrated electronic semiconductor device to be encapsulated within a plastic body, being of the type which comprises the step of molding said plastic body so as to fully enclose a semiconductor element, on which an integrated electronic circuit has been formed and which is placed onto a metal leadframe connected electrically to said integrated electronic circuit and carrying a plurality of terminal leads for external electric connection. To compensate the outward bends uncontrollably undergone by the plastic body due to thermal stresses during the molding step, a mold is used which has a cavity delimited by perimeter walls which define a concave-shaped volume. Preferably, at least one of the large walls, a bottom wall and a top wall, has a curvature inwardly of said mold cavity. The curvature values are predetermined to compensate any outward curvature undergone by corresponding surfaces of said plastic body during the molding step.
    Type: Grant
    Filed: October 30, 1995
    Date of Patent: August 5, 1997
    Assignee: SGS-Thomson Microelectronics, S.r.l.
    Inventors: Luigi Romano', Fulvio Tondelli
  • Patent number: 5654726
    Abstract: A pointing object display technique that can manipulate a pointing object without the user being aware of a difference in display time between sites in a distributed computing environment is disclosed. It is so designed that with whatever level of time difference the receiver side receives a pointing object is displayed and confirmed using an auxiliary pointing object on the sender's screen and the positional difference on the display is absorbed. In addition, the receiver side predicts the current position of the sender's pointing object by taking the time difference on the display into account and displays a pointing object at the predicted position on the receiver's screen.
    Type: Grant
    Filed: May 26, 1994
    Date of Patent: August 5, 1997
    Assignee: International Business Machines Corporation
    Inventors: Yoshiaki Mima, Fumio Ando, Takashi Sakairi
  • Patent number: 5651493
    Abstract: A method for analyzing solder joint assemblies in devices such as solder bumped silicon chips, ball grid arrays or land grid arrays is disclosed. The method includes applying a dye solution to a device under test and then causing that dye solution to penetrate any interstices between any solder interconnect and the device under test, which also includes penetrating any fractures in any joints or joint failures. Next, the dye is dried or cured so as to provide ready analysis upon the analysis portion of the method. The device under test is then caused to be separated or fractured in such a way that a seam or border of a solder joint or an attachment border may be analyzed to identify any structural failure by visually analyzing where any dye has penetrated such structural failures.
    Type: Grant
    Filed: April 24, 1995
    Date of Patent: July 29, 1997
    Assignee: International Business Machines Corporation
    Inventors: James D. Bielick, Mark K. Hoffmeyer, Phillip D. Isaacs
  • Patent number: 5652410
    Abstract: A conductive insert for protecting an externally mounted microelectronic device is disclosed. The conductive insert is designed to prevent ESD (Electrostatic Discharge) or RFI (Radio Frequency Interference) destruction or inoperability of the microelectronic device. The conductive insert includes a first exterior surface and a second interior surface. The second interior surface has a conductor material applied thereon for providing ESD or RFI protection to the externally mounted electronic device. To protect the externally mounted microelectronic device, the conductive insert mounts within a mounting plate for covering the externally mounted electronic device. Instead of having a conductive material applied to the interior surface, the conductive insert may be manufactured from a conductive material initially.
    Type: Grant
    Filed: July 11, 1996
    Date of Patent: July 29, 1997
    Assignee: International Business Machines Corporation
    Inventors: Steven P. Hobbs, Stephen E. Wheeler
  • Patent number: 5636097
    Abstract: A circuit is provided for protecting against an increase in collector current for an integrated circuit containing a power switching device. The power device drives an inductive load connected to a power supply, and is connected to a control circuit for switching the power device on and off. The protection circuit contains a clamping circuit for deactivating the control circuit and switching the power device off when the current flowing through the power device reaches a preset maximum value. In addition, a circuit is provided for inhibiting the operation of the clamping circuit for a preset time interval after the power device has been switched on, and for keeping the clamping circuit in operation during voltage undershoots caused by the inductive load following the switching of the powered device off.
    Type: Grant
    Filed: June 6, 1995
    Date of Patent: June 3, 1997
    Assignee: Consorzio Per la Ricerca Sulla Microelettronica
    Inventors: Sergio Palara, Stefano Sueri
  • Patent number: 5633661
    Abstract: A video random access memory is disclosed that performs a block write function for an opaque pattern color expansion. The video RAM, or VRAM, uses an input buffer for receiving and holding video input information. A first color register is coupled to the input buffer and holds a first color value. A second color register coupled to the input buffer is used to hold a second color value. A gate multiplexor couples to both first color register and the second color register with a color selection register being used to gate which color value from the first color register or the second color register should be asserted. A write control logic selects which color values are to be displayed. A third or mask register is coupled to the input buffer and the write control logic such that, based upon data from the input buffer, the mask register selects which pixel location is to be changed based on the color value selected by the color selection register as received from the write control logic.
    Type: Grant
    Filed: November 21, 1994
    Date of Patent: May 27, 1997
    Assignee: International Business Machines Corporation
    Inventor: Gary J. Morse
  • Patent number: 5631601
    Abstract: A method of demodulating an FM carrier wave and an FM demodulation circuit are described which use a phase locked loop. An FM input signal including the carrier wave is supplied to a phase detector in the phase locked loop. The output of the phase detector is filtered and used to generate a signal for use in controlling a voltage controlled oscillator having an output also connected to the phase detector. The phase locked loop is tuned to a selected carrier wave frequency and a variable gain setting of a variable gain circuit in the phase locked loop is selected to select a desired loop gain. The signal for use in controlling the voltage controlled oscillator is varied by the variable gain circuit to alter the amount by which the frequency of the output of the voltage controlled oscillator changes in relation to a given output of the phase detector. The variable gain setting is selected to select a required bandwidth for demodulation.
    Type: Grant
    Filed: December 30, 1993
    Date of Patent: May 20, 1997
    Assignee: SGS-Thomson Microelectronics Limited
    Inventors: Wayne L. Horsfall, Gary Shipton
  • Patent number: 5619643
    Abstract: A circuit for generation of a reset signal in an electronic device, of the type comprising a microprocessor interlocked with a circuit generating a clock signal and memories of both the volatile type and the non-volatile type, is capable of detecting a stop in the oscillation of said clock signal and generating a logic signal coupled with the reset input of the microprocessor.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: April 8, 1997
    Assignee: SGS-Thomson Microelectronics, S.R.L.
    Inventors: Angelo Moroni, Flavio Scarra, Alberto Taddeo
  • Patent number: 5617046
    Abstract: A diagnostic signal, indicative of the reaching of a predefined level, lower than a fixed maximum limit value, by the current flowing through a power transistor, is generated while employing a single comparator of a reference voltage with the voltage present across a sensing resistance, thus preventing problems arising from different offset characteristics of distinct comparators. By the use of current mirrors, the generation of a diagnostic signal when the current reaches a level that can be fixed very close to the maximum limit value, may be reliably triggered, irrespectively of the offset characteristic of the single comparator employed.
    Type: Grant
    Filed: July 8, 1994
    Date of Patent: April 1, 1997
    Assignees: SGS-Thomson Microelectronics, S.r.l., Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno
    Inventors: Sergio Palara, Stefano Sueri
  • Patent number: 5617295
    Abstract: A leadframe for electronic semiconductor devices incorporates one or two metal bars fastened to a heat dissipator by electroconductive means.Each bar has a metallized area for the electric connection, by means of a bonding wire, with a semiconductor chip placed on the dissipator.According to the present invention, the metallized areas are lowered in relation to the upper surface of the metal bar, so that lead frames can be stacked, during packing and transportation, directly on each other without danger of damaging the metallized areas.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: April 1, 1997
    Assignee: SGS-Thomson Microelectronics, S.R.L.
    Inventors: Renato Poinelli, Mauro Mazzola, Paolo Casati
  • Patent number: 5606531
    Abstract: An electronic device including a microprocessor, a circuit generating a clock signal, and memories of both the volatile type and the non-volatile type, incorporates a circuit for generation of a reset signal capable of detecting a stop in the oscillation of said clock signal and generating a logic signal coupled with the reset input of the microprocessor. The circuit monitors the clock signal applied to the device and, if an irregularity is detected, generate a reset signal holding the microprocessor in a safe state. The reset signal is held until the circuit generating the clock signal resumes normal operation.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: February 25, 1997
    Assignee: SGS-Microelectronics, S.R.L.
    Inventors: Angelo Moroni, Flavio Scarra', Alberto Taddeo
  • Patent number: 5601303
    Abstract: A trailer assembly is provided for towing a vehicle having a lift arm which can be raised and lowered. The trailer assembly utilizes a front and rear frame support which are coupled to opposite ends of the frame of the vehicle being towed. A support leg, which is pivotally mounted to the front frame support, is coupled to the lift arm of the vehicle so that a support end of the support leg engages the ground, lifting the front frame support and causing the vehicle being towed to be raised off the ground. The rear frame support also has wheels which can be retracted and extended to facilitate lifting of the vehicle.
    Type: Grant
    Filed: July 20, 1994
    Date of Patent: February 11, 1997
    Assignee: Deere & Company
    Inventor: Mark R. Underwood
  • Patent number: 5602055
    Abstract: A semiconductor device comprising a silicon substrate, an oxide layer on the silicon substrate, a doped polysilicon region disposed on the oxide layer, a dielectric layer which has been deposited over the doped polysilicon region and the silicon substrate, a contact hole which is formed in the dielectric layer and extends over respective laterally adjacent portions of the doped polysilicon region and the silicon substrate and a contact which has been selectively deposited in the contact hole which electrically connects the said portions together.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: February 11, 1997
    Assignee: Inmos Limited
    Inventors: Howard C. Nicholls, Michael J. Norrington
  • Patent number: 5597742
    Abstract: The base region of the power stage and the horizontal isolation region of the integrated control circuit or collector region of a transistor of an integrated circuit consist of portions of an epitaxial layer with a first conductivity type grown in sequence on an underlying epitaxial layer with a second conductivity type opposite the first.
    Type: Grant
    Filed: May 16, 1995
    Date of Patent: January 28, 1997
    Assignee: Consorzio per la Ricerca Sulla Microelettronica Nel Mezzogiorno
    Inventor: Raffaele Zambrano
  • Patent number: 5597043
    Abstract: In the preferred embodiment of the present invention, completion operations are performed which include a perforation operation followed by a fracturing operation. During the perforation operation perforations (or other means for creating flow paths) are shot at a low perforation density, in order to create a flowpath between the wellbore and the hydrocarbon bearing formation as well as an unknown number of relatively wide fractures and relatively few, but unknown number of fracture initiation sites in the hydrocarbon bearing formation. During the fracturing operations, relatively small, high-concentration proppant slugs with clean spacer stages are pumped early in the treatment, in order to screenout the narrower fractures, but these slugs are not sufficient to screenout the wider fractures.
    Type: Grant
    Filed: March 17, 1995
    Date of Patent: January 28, 1997
    Assignee: Cross Timbers Oil
    Inventor: Jerome M. Stadulis
  • Patent number: 5590462
    Abstract: A dam is provided on a surface of a circuit board to which an integrated circuit device is to be mounted. The dam defines a region between the integrated circuit package and the circuit board, and a material is injected into this region after the device has been mounted on the circuit board. This material preferably is a good thermal conductor, assisting in the removal of heat from the device. The injected material also preferably acts as an adhesive, more firmly bonding the device the circuit board.
    Type: Grant
    Filed: May 24, 1995
    Date of Patent: January 7, 1997
    Assignees: SGS-Thomson Microelectronics s.r.l., SGS-Thomson Microelectronics, Inc.
    Inventors: Michael J. Hundt, Carlo Cognetti
  • Patent number: 5587339
    Abstract: A method of fabricating a semiconductor device incorporating a via and an interconnect layer of aluminium or aluminium alloy. The invention provides a semiconductor device including a via and an interconnect layer of aluminium or aluminium alloy, a capping layer of electrically conductive material which has been formed over the interconnect layer and an electrically conductive contact which has been selectively deposited on the capping layer thereby to form a via, the materials of the capping layer and of the contact being selected whereby at the interface therebetween there is substantial absence of non-conductive compounds formed from the material of the capping layer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 24, 1996
    Assignee: SGS-Thomson Microelectronics Ltd.
    Inventors: Graeme M. Wyborn, Howard C. Nicholls
  • Patent number: 5583417
    Abstract: A technique for detecting power demand to provide efficient power sharing. The technique is particularly but not exclusively concerned with providing a power sharing detector for use in a portable computer which requires battery charging to be done concurrently with computer usage, and preferably provides three different rates of charging. A power sharing detector is provided for use with this technique. The power sharing detector is used in a circuit which has a power supply which supplies power both to an auxiliary device and a battery charger. The detector has a voltage detection circuit which is connected to receive a voltage representative of the power supplied to the auxiliary device and to determine therefrom a state of the auxiliary device.
    Type: Grant
    Filed: February 3, 1994
    Date of Patent: December 10, 1996
    Assignee: SGS-Thomson Microelectronics PTE Ltd.
    Inventor: Tang K. Yuen
  • Patent number: 5579283
    Abstract: A method and apparatus for communicating coded messages in a wellbore between a transmission node and a reception node is provided. The coded messages are messages are impressed upon a fluid column which extends between the transmission node and the reception node. A transmission apparatus is provided at the transmission node which is in communication with the fluid column, for altering pressure of the fluid column to generate at least a portion of the coded message. A reception apparatus is provided at the reception node. The reception apparatus includes a rigid structural component with an exterior surface which is in direct contact with fluid column and an interior surface which is not in contact with the fluid column, and a sensor assembly which detects elastic deformation of the rigid structural component. The transmission apparatus is utilized to alter pressure of the fluid column in a predetermined pattern to generate at least one coded message.
    Type: Grant
    Filed: June 3, 1993
    Date of Patent: November 26, 1996
    Assignee: Baker Hughes Incorporated
    Inventors: Steve C. Owens, Brett W. Bouldin, David E. Rothers, Douglas J. Lehr, Michael W. Holcombe
  • Patent number: RE35385
    Abstract: A method for positioning an electronic component and its contacts on a card is disclosed. The electronic component is first of all placed in the cavity of the card, then the electrical contacts are placed on the card and electrically connected to the output terminals by a so-called tape automatic bonding process using a film on which the electrical contacts are deposited.
    Type: Grant
    Filed: November 9, 1994
    Date of Patent: December 3, 1996
    Assignee: SGS-Thomson Microelectronics, SA.
    Inventor: Jean-Pierre Gloton