Abstract: The invention relates to the field of system on a chip, SoC, information processing architecture and particularly to the use of a homogenous, concurrent-communication interconnection architecture that allows a variety of different functions to be connected together and their full synergistic performance realized. The functions are decoupled from each other, allowing performance optimization of each function without regard for the other functions on the chip. The system data flow is coordinated using a overall system schedule allowing data interactions to be orchestrated efficiently.