Abstract: A method and system for high speed bussing in microprocessors and microelectronic devices is disclosed. The method and system implement a type of differential bus with distributed bus pre-charge units designed to decrease bus pre-charge time. The method and system utilize a universal self-tracking clock signal to determine the minimum required bus pre-charge time. The time saved by decreasing the bus pre-charge time can be directly applied to the bus evaluation period thereby increasing system performance and reliability.