Patents Represented by Law Firm Finengan, Henderson, Farabow, Garrett, & Dunner
  • Patent number: 8300814
    Abstract: There is provided an information processing unit enabling reduction of the number of keys to be held by a terminal unit and the amount of calculations necessary for decryption of encrypted data. The information processing unit configures an entire binary tree made up of n-number of leaf nodes, a root node and a plurality of intermediate nodes different from the root node and the leaf nodes and divides the entire tree into a plurality of base subtrees including n1/y number of leaf nodes to form a y-level (y is a divisor of log(n)) hierarchical structure, such that root nodes of the base subtrees at a lower level coincide with leaf nodes of the base subtree at an upper level. Further, it assigns subsets of the terminal units to nodes of the respective base subtrees and generates directed graphs where directed edges connecting coordinate points on a coordinate axis are set.
    Type: Grant
    Filed: October 3, 2007
    Date of Patent: October 30, 2012
    Assignee: Sony Corporation
    Inventors: Tomoyuki Asano, Masafumi Kusakawa
  • Patent number: 6559044
    Abstract: A method for forming contacts in a semiconductor device including a plurality of active devices formed over a substrate that includes depositing a first layer of dielectric material over the substrate and plurality of active devices, forming a first opening in the first layer of dielectric material, depositing a second layer of dielectric material over the first layer of dielectric material and in the first opening, providing a mask over the second layer of dielectric material, wherein the mask material is distinguishable over silicon oxides, and forming a second opening and a third opening in the second layer of dielectric material, wherein the second opening is aligned with the first opening and exposes a first silicide of a first active device, and the third opening exposes one of diffused regions of a second active device.
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: May 6, 2003
    Assignee: ProMos Technologies, Inc.
    Inventors: Chun-Che Chen, Fang-Yu Yeh, Han-Chih Lin, Chin-Sheng Chen
  • Patent number: 6344814
    Abstract: A driving circuit suitable for driving pixels in an LCD array includes dual channel digital-to-analog converters (DACs). Each dual channel DAC outputs on channel A and channel B outputs the analog version of an applied digital signal and a non-passing voltage, respectively, and switches these outputs in response to a toggle signal. The DAC outputs are applied to paired output transistors such that one transistor of each transistor pair is rendered conductive and the other transistor is rendered non-conductive during each display cycle. By designating alternate DACs to receive upper and lower voltage range driving voltages, respectively, each pixel is alternately driven by voltages in the upper and lower voltage range and the driving voltage range applied to each pixel in one display cycle is opposite to the voltage range applied to the immediately adjacent pixels in the same display cycle.
    Type: Grant
    Filed: December 10, 1999
    Date of Patent: February 5, 2002
    Assignee: Winbond Electronics Corporation
    Inventors: Shi-Tron Lin, Yung-Peng Hwang
  • Patent number: 4849793
    Abstract: To shield electromagnetic waves generated from the inside of an image reading apparatus to the outside through the original mounting portion thereof, shielding means is attached to the platen cover thereof. The shielding means is any one of conductive materials such as metal sheet, paint, cloth, plastic, etc. To further effectively shield the field, the shielding means is grounded via connecting means to the apparatus body.
    Type: Grant
    Filed: May 15, 1987
    Date of Patent: July 18, 1989
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Akihiko Someya