Abstract: A CPU interprets and executes a command in accordance with a program. A DMA channel selector is controlled by the CPU. The DMA channel selector determines whether a DMA transfer control signal from each of the independent DMA transfer control lines of a plurality of expansion slots is a common DMA transfer control signal or an independent DMA transfer control signal for each slot, thus connecting each of the independent DMA transfer control lines to a first or second DMAC. With this operation, an independent DMA transfer control line is assigned to each expansion slot while the compatibility with each expansion slot of an existing apparatus is maintained.