Patents Represented by Attorney, Agent or Law Firm Finnegan, Henderson, Farabow, Garrett and Dunner, L.L.P.
  • Patent number: 8345789
    Abstract: In a communication system, such as a Multiple Input Multiple Output system operating in a spatial multiplexing mode, for use, e.g., in a WLAN or HSPDA device, a plurality of information flows are received via a set of receive antennas by deriving from at least some, and possibly all, of the receive antennas, respective RF signals, and producing from the RF signals thus derived, a plurality of receive signals, each receive signal to be demodulated to recover one of the information flows transmitted. The receive signals are produced as combinations of the RF signals having applied thereto relative RF phase shift weights.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: January 1, 2013
    Assignees: Telecom Italia S.p.A., Pirelli & C. S.p.A.
    Inventors: Alfredo Ruscitto, Bruno Melis, Loris Bollea, Valeria D'Amico, Maurizio Fodrini
  • Patent number: 8343724
    Abstract: A circular DNA is provided comprising endogenous DNA common to both genetically modified wheat and non-genetically modified wheat along with one or more pieces of DNA each having a sequence present specifically in a strain of genetically modified wheat. Also provided is a method for determining a mix rate of genetically modified wheat in a test sample.
    Type: Grant
    Filed: August 25, 2011
    Date of Patent: January 1, 2013
    Assignees: Nisshin Seifun Group Inc., Incorporated Administrative Agency National Agriculture and Food Research Organization
    Inventors: Akihiro Hino, Takashi Kodama, Mayu Iida, Hirohito Yamakawa, Satomi Nozaki, Katsuyuki Hayakawa
  • Patent number: 8343692
    Abstract: According to one embodiment, an exposure apparatus inspection mask includes a substrate and a first pattern portion. The substrate has a major surface reflective to exposure light. The first pattern portion is provided on the major surface. The first pattern portion includes a first lower layer and a plurality of first reflection layers. The first lower layer is provided on the major surface and includes a plurality of first absorption layers periodically arranged at a prescribed pitch along a first direction parallel to the major surface and is absorptive to the exposure light. The plurality of first reflection layers are provided on a side of the first lower layer opposite to the substrate, are periodically arranged at the pitch along the first direction, expose at least part of each of the plurality of first absorption layers, and have higher reflectance for the exposure light than the first absorption layers.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: January 1, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuhiro Komine, Kazuya Fukuhara
  • Patent number: 8343874
    Abstract: In a semiconductor device manufacturing method, on a film to be processed, a mask material film is formed which has pattern openings for a plurality of contact patterns and connection openings for connecting adjacent pattern openings in such a manner that the connection between them is constricted in the middle. Then, a sidewall film is formed on the sidewalls of the individual openings in the mask material film, thereby not only making the diameter of the pattern openings smaller but also separating adjacent pattern openings. Then, the film to be processed is selectively etched with the mask material film and sidewall film as a mask, thereby making contact holes.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: January 1, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shinya Watanabe
  • Patent number: 8343757
    Abstract: This invention provides a new approach to the design of a virus with a defective replication cycle, which can be rescued by wild type virus co-infection, and which expresses foreign antigenic epitopes that contribute to the elimination of virus infected cells and then to viral clearance. The vector of the invention, by expression of epitopes derived from common pathogens, by-passes existing tolerance of virus specific T cell responses. The vector will only replicate in virus infected cells.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: January 1, 2013
    Assignees: Institut Pasteur, Institut National de la Sante et de la Recherche Medicale (INSERM)
    Inventors: Qiang Deng, Marie-Louise Michel
  • Patent number: 8347241
    Abstract: A pattern generation method includes: acquiring a first design constraint for first patterns to be formed on a process target film by a first process, the first design constraint using, as indices, a pattern width of an arbitrary one of the first patterns, and a space between the arbitrary pattern and a pattern adjacent to the arbitrary pattern; correcting the first design constraint in accordance with pattern conversion by the second process, and thereby acquiring a second design constraint for the second pattern which uses, as indices, two patterns on both sides of a predetermined pattern space of the second pattern; judging whether the design pattern fulfils the second design constraint; and changing the design pattern so as to correspond to a value allowed by the second design constraint when the design constraint is not fulfilled.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: January 1, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Fumiharu Nakajima, Toshiya Kotani, Hiromitsu Mashita, Chikaaki Kodama
  • Patent number: 8345936
    Abstract: A multispectral iris recognition system includes a multispectral camera adapted to acquire spatially registered iris images simultaneously in at least three wavelengths and a database adapted to store the acquired iris images. A texture analysis section identifies an area within each acquired iris image having a maximum texture at each of the wavelengths. The identified areas are combined to generate an enhanced iris image. Additionally, a visible light iris image is acquired and stored along with a set of transformation mappings in a database. The acquired visible light iris image is modeled in a texture model, which clusters textures from the acquired visible light iris image. A mapping is selected from the database for each of the clusters. The selected mappings are applied to the acquired visible light iris image to generate a Near-Infrared equivalent.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: January 1, 2013
    Assignee: Noblis, Inc.
    Inventors: Mark J. Burge, Matthew K. Monaco
  • Patent number: 8344148
    Abstract: The present invention provides a novel intermediate for manufacturing a 2,3-dihydroimidazo[2,1-b]oxazole compound with a high yield and a high purity, and a manufacturing method of the intermediate. The present invention provides an epoxy compound represented by the general formula (2): wherein, R1 represents hydrogen or a lower alkyl group; and R2 represents a piperidyl group represented by the general formula (A1): (wherein, R3 represents a phenoxy group having a halogen-substituted lower alkoxy group substituted on a phenyl group, and the like) and the like; and n represents an integer of 1 to 6, a manufacturing method of the epoxy compound, and a manufacturing method of an oxazole compound using the epoxy compound.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: January 1, 2013
    Assignee: Otsuka Pharmaceutical Co., Ltd.
    Inventors: Hidetsugu Tsubouchi, Yoshikazu Haraguchi, Satoshi Hayakawa, Naoto Utsumi, Shinichi Taira, Yoshihisa Tanada, Nobuhisa Fujita, Koichi Shinhama, Kimiyoshi Annaka, Takuya Furuta
  • Patent number: 8346537
    Abstract: An input apparatus which presents examples suitable to users, including an example storage module to store a plurality of example expressions; an edit storage module to store edits when a user edits the plurality of example expressions; a presentation example determining module to determine one or more presentation examples to be presented to the user from the plurality of example expressions stored in the example storage module; an edit adapting module to edit the presentation examples determined by the presentation example determining module based on the edits stored in the edit storage module; a display control module to present the presentation examples determined by the presentation example determining module to the user; and an entry accepting module to accept one of the presentation examples as a selected example when one of the presentation examples is selected by the user, or to receive edits from the user to one of the presentation examples and accept the edited presentation example as the selected
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: January 1, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tetsuro Chino, Satoshi Kamatani, Kazuo Sumita
  • Patent number: 8344256
    Abstract: A modular polymeric insulator for overhead power distribution networks. The insulator includes a first insulating module adjacent to a supporting element; at least one further insulating module superimposed to the first insulating module and a non-metallic pin extending through the first insulating module and the at least one further insulating module. The modular polymeric insulator has a similar performance to a “Post type” insulator with the advantage of being resistant to impact and much lighter than a “Post type” insulator.
    Type: Grant
    Filed: June 9, 2005
    Date of Patent: January 1, 2013
    Assignee: Prysmian Energia Cabos E Sistemas Do Brasil S.A.
    Inventor: Rodnei Ancilotto
  • Patent number: 8344805
    Abstract: There is provided a high-frequency differential amplifier circuit comprising: a first MOS transistor, a second MOS transistor, a first positive feedback element and a second positive feedback element. The first MOS transistor and the second MOS transistor each has a source connected to a first power source and a drain connected through loads to a second power source. The first and second MOS transistors receives at their gates, first and second input signals having phases reverse to each other. The first positive feedback element includes a first capacitor and a first variable resistance connected in series between the gate of the first MOS transistor and the drain of the second MOS transistor. The second positive feedback element includes a second capacitor and a second variable resistance connected in series between the gate of the second MOS transistor and the drain of the first MOS transistor.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: January 1, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tong Wang, Toshiya Mitomo
  • Patent number: 8342220
    Abstract: In tire manufacture, a belt structure is made by means of strip-like segments each including parallel cords incorporated into an elastomeric layer, which strip-like segments are sequentially laid down in mutual circumferential side by side relationship on a toroidal support.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: January 1, 2013
    Assignee: Pirelli Tyre S.p.A.
    Inventors: Stefano Sangiovanni, Maurizio Marchini, Massimo Mortarino
  • Patent number: 8343870
    Abstract: A semiconductor device which can effectively suppress a short channel effect and junction leakage is provided. A semiconductor device includes a field effect transistor. The field effect transistor includes a first semiconductor region of a first conductivity type, a gate electrode formed on a gate insulating film, and source and drain electrodes. The field effect transistor also includes second semiconductor regions of a second conductivity type. The field effect transistor further includes third semiconductor regions of the second conductivity type having an impurity concentration higher than that of the second semiconductor region and formed between the source electrode and the first and second semiconductor regions and between the drain electrode and the first and second semiconductor regions, and side wall insulating films formed on both the side surfaces of the gate electrode. The source electrode and the drain electrode are separated from the side wall insulating films.
    Type: Grant
    Filed: September 1, 2009
    Date of Patent: January 1, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Atsuhiro Kinoshita, Junji Koga
  • Patent number: 8346052
    Abstract: In an HDMI-connected AV system, bidirectional data transmission between two devices is implemented at low cost. An audio amplifying device serving as an HDMI source and a display device as an HDMI sink are connected additionally using an auxiliary transmission path such as IEEE 1394, so that the data received by the display device 3 from another device is transmitted to the audio amplifying device 2 over the auxiliary transmission path. In this setup, the display device 3 generates a CTS based on a clock regenerated by ACR and on a TMDS clock received from the audio amplifying device 2 via the HDMI, and transmits the CTS over the auxiliary transmission path along with a frequency dividing ratio N. The audio amplifying device generates an audio signal clock from the CTS and N thus received.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: January 1, 2013
    Assignee: Sony Corporation
    Inventor: Gen Ichimura
  • Patent number: 8340318
    Abstract: A method for measuring performance of a noise cancellation system that is operable to cancel noise is provided. The method includes generating a first model of a target noise. The first model represents the target noise in a form that is received at a location remote from a noise source of the target noise and within a defined environment. The method also includes generating a second model of a cancellation noise. The cancellation noise is configured to at least partially cancel the target noise when combined with the target noise. The second model represents the cancellation noise in a form that is received at the location. The method also includes determining, using the first model and the second model, a cancellation error value indicative of only a portion of the target noise that remains when the target noise and the cancellation noise are combined.
    Type: Grant
    Filed: December 28, 2006
    Date of Patent: December 25, 2012
    Assignees: Caterpillar Inc., Bringham Young University
    Inventors: David C. Copley, Benjamin Mahonri Faber, Scott D. Sommerfeldt
  • Patent number: 8340282
    Abstract: A high-security cryptanalysis-resistant cryptographic processing apparatus and a cryptographic processing method are provided. A Feistel common key block cipher is produced by repeatedly performing an SPN-type F-function including a nonlinear transformation part and a linear transformation part over a plurality of rounds. In each round, a linear transformation process is performed according to an F-function using a matrix determined so as to satisfy a relatively loose constraint whereby high resistance to differential attacks and/or linear attacks is achieved. The relatively loose constraint allows an increase in the number of candidates for usable matrices, and it is possible to maintain the number of active S-boxes to a sufficiently large level.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: December 25, 2012
    Assignee: Sony Corporation
    Inventor: Taizo Shirai
  • Patent number: 8339641
    Abstract: Systems and methods consistent with embodiments presented facilitate packaged print data processing. In some embodiments, an initial fragment of print data is parsed to determine if the print data occurs in the form of an OPC print package. If the print data is an OPC package, a language processor for a PDL is invoked using a language entry point function for the PDL, which can be determined using a text string that is present in the print job filename and in a Content Types list in a Content Types file associated with the OPC package. If the PDL language processor cannot be determined using the Content Types list then a language entry point may be determined using a file extension associated with the print job.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: December 25, 2012
    Assignee: Konica Minolta Laboratory U.S.A., Inc.
    Inventor: Jason Grams
  • Patent number: 8340709
    Abstract: According to an aspect of the present invention, there is provided a wireless communication device including: a cable port to which an external device is connected; a reading unit that reads identification information from the external device; a determination unit that determines whether the external device is the source-side wireless communication device; an authentication memory unit that performs an authentication process with the source-side wireless communication device; a wireless communication unit that performs a wireless communication with the source-side wireless communication device; and a physical address processing unit that controls the source-side wireless communication device to store a physical address of a source-side device calculated based on from the read identification information of the sink-side device.
    Type: Grant
    Filed: August 31, 2011
    Date of Patent: December 25, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomokazu Yuasa
  • Patent number: 8340433
    Abstract: An image processing apparatus include: a storage unit storing an image of a processing target; a tangent calculating unit extracting contours as a bent lines represented by sets of contour points from an image read from the storage unit and computing tangents to the extracted contour; a projecting unit projecting computed tangents to axes in directions orthogonal to the corresponding tangents, and computing coordinates of intersections where the tangents intersect the axes; and a rectangle calculating unit selecting intersections with maximum values and minimum values of coordinates among intersections computed by the projecting unit for each direction of the axis, and computing a rectangle formed by a pair of parallel tangents passing through two intersections with maximum values and minimum values selected for a first axis and another pair of tangents passing through two intersections with maximum values and minimum values selected for a second axis orthogonal to the first axis.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: December 25, 2012
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Solutions Corporation
    Inventor: Tomohisa Suzuki
  • Patent number: 8338889
    Abstract: The disclosure concerns a method of manufacturing a semiconductor device including forming a plurality of fins made of a semiconductor material on an insulating layer; forming a gate insulating film on side surfaces of the plurality of fins; and forming a gate electrode on the gate insulating film in such a manner that a compressive stress is applied to a side surface of a first fin which is used in an NMOSFET among the plurality of fins in a direction perpendicular to the side surface and a tensile stress is applied to a side surface of a second fin which is used in a PMOSFET among the plurality of fins in a direction perpendicular to the side surface.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: December 25, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akio Kaneko, Atsushi Yagishita, Satoshi Inaba