Abstract: A high speed two-port Static Random Access Memory (SRAM) circuit with a write-through function includes a write-through unit receiving data signals DATA, DATAB outputted from a memory cell, carrying out a write-through operation, and outputting first to third signals S1, S2, S3, a data equalizer for equalizing the data signal DATA and the data bar signal DATAB in accordance with an externally generated data line equalizing signal DLEQ, a sense amplifier sensing the data signal DATA and the data bar signal DATAB and amplifying the sensed signals, a switching unit pre-amplifying the data signal DATA and the data bar signal DATAB received via the sense amplifier in accordance with an externally generated read enable signal RE and the first and second signals S1, S2 outputted from the write-through unit, and an output selection unit selecting the third signal S3 from the write-through unit or an output signal of the sense amplifier, in accordance with the first signal S1 outputted from the write-through unit.