Abstract: The invention includes a system and method of modifying a setting of a NAND flash memory device using serial peripheral interface (SPI) communication from a master to the NAND flash memory device. One embodiment generally includes sending an enable signal to a first memory circuit input, sending a clock signal to a second memory circuit input, sending a command signal synchronized to the clock signal to a third memory circuit input, sending a memory register address signal synchronized to the clock signal to the third memory circuit input, and sending a setting signal synchronized to the clock signal to the third memory circuit input.
Abstract: A technique is provided for processing image data based upon determination of whether pixilated data tends to represent or exhibit one characteristic or another. Many such characteristics may be considered, such as whether the pixels probably represent structures or non-structures. Multiple thresholds for the classification of segmentation are used, and pixels falling within an overlapping regions are processed as if they exhibited both characteristics. Subsequent processing may include assignment of values for the overlapping pixels, such as by weighted blending.
Abstract: A device that includes an internal data storage location coupled to an electrical conductor and an analog-to-digital converter coupled to the internal data storage location via the electrical conductor. In some embodiments, the analog-to-digital converter includes a comparator having an input coupled to the electrical conductor and a switch coupled to the electrical conductor.
Abstract: Memory devices are disclosed, such as those that include a semiconductor-on-insulator (SOI) NAND memory array having a boosting plate. The boosting plate may be disposed in an insulator layer of the SOI substrate such that the boosting plate exerts a capacitive coupling effect on a p-well of the memory array. Such a boosting plate may be used to boost the p-well during program and erase operations of the memory array. During a read operation, the boosting plate may be grounded to minimize interaction with p-well. Systems including the memory array and methods of operating the memory array are also disclosed.
Abstract: Embodiments of the present invention include systems and methods that relate to pulse oximetry. Specifically, one embodiment includes an oximeter sensor comprising a light emitting element configured to emit light, a light detector configured to detect the light, and a memory storing an ambient light value for comparison with a detected ambient light measurement.
Type:
Grant
Filed:
June 2, 2006
Date of Patent:
January 10, 2012
Assignee:
Tyco Healthcare Group LP
Inventors:
Paul D. Mannheimer, Michael E. Fein, Marcia Fein, legal representative
Abstract: The present disclosure provides a biosensor capable of producing an indicator response upon detection of the presence of certain metabolites in a biological sample. The biosensor includes a hydrogel that is functionalized with affinity molecules specific to markers for one or more pathogens. The biosensor also includes a detection system adapted to detect the binding the pathogen-specific markers with their corresponding affinity molecules.
Abstract: The present invention provides a memory chip for use in an oximeter sensor, or an associated adapter or connector circuit. The memory chip allows the storing of patient related data, such as patient trending data or a patient ID, to provide enhanced capabilities for the oximeter sensor. In addition to providing unique data to store in such a memory, the present invention include unique uses of the data stored in such a memory.
Type:
Grant
Filed:
September 30, 2005
Date of Patent:
January 3, 2012
Assignee:
Tyco Healthcare Group LP
Inventors:
David Swedlow, Michael E. Fein, Marcia Fein, legal representative, Paul D. Mannheimer
Abstract: Embodiments are provided for protecting boot block space in a NAND memory device connected to a host device via an SPI interface. One such method includes programming a boot block password into the NAND memory device such that the host device is required to provide the boot block password in order to access the boot block space. A counter may be provided to track the number of times the host device provides an incorrect password, permanently locking the boot block space if the counter reaches a predetermined value. A further method includes associating each of various areas of the boot block space with at least one write lock bit, setting the write lock bit to a lock enable or lock disable value, and locking or unlocking an area of the boot block space depending on the value of its associated write lock bit. Areas of the boot block space may include a single boot block page, a single boot block, or a plurality of boot blocks.
Abstract: An improved stacked-die package includes an interposer which improves the manufacturability of the package. A semiconductor package includes a package substrate having a plurality of bond pads; a first semiconductor device mounted on the package substrate, the first semiconductor device having a plurality of bond pads provided thereon; an interposer mounted on the first semiconductor device, the interposer having a first interposer bond pad and a second interposer bond pad, wherein the first and second interposer bond pads are electrically coupled; a second semiconductor device mounted on the interposer, the second semiconductor device having a plurality of bond pads provided thereon; a first bond wire connected to one of the plurality of bond pads on said first semiconductor and to the first interposer bond pad; and a second bond wire connected to the second interposer bond pad and to one of the plurality of bond pads on the semiconductor device.
Abstract: The present techniques provide systems and methods for modulation coding of data on optical disks, such as holographic data disks, and techniques for reading that data back from the disks. The techniques involve parsing a bit stream into a sequence of individual bit-patterns, and then using the individual bit patterns to select a symbol, or matrix, from a lookup table of previously selected matrices. The symbols are selected according to predetermined criteria that may help make the disk more resistant to interferences and errors, such as surface scratches, and the like. For example, criteria that may be used to select the symbols are the number of reflective and non-reflective regions within each matrix, and the number of sequential reflective regions, among others. The symbols may be written to the disk in a two-dimensional fashion, e.g., across adjacent tracks, or in a three-dimensional fashion, e.g., across adjacent data layers.
Type:
Grant
Filed:
December 16, 2008
Date of Patent:
January 3, 2012
Assignee:
General Electric Company
Inventors:
John Erik Hershey, Nick Andrew Van Stralen, Harold Woodruff Tomlinson, Jr., John Anderson Fergus Ross, Zhiyuan Ren, Zexin Pan, Victor Petrovich Ostroverkhov, Xiaolei Shi
Abstract: Systems, methods, and devices for obtaining data from a data location. The method may include generating a first value by sensing a data location under a first condition and generating a second value by sensing the data location under a second condition. The method may further include combining the first value with the second value to identify data conveyed by the data location.
Abstract: Techniques for forming devices, such as transistors, having vertical junction edges. More specifically, shallow trenches are formed in a substrate and filled with an oxide. Cavities may be formed in the oxide and filled with a conductive material, such a doped polysilicon. Vertical junctions are formed between the polysilicon and the exposed substrate at the trench edges such that during a thermal cycle, the doped polysilicon will out-diffuse doping elements into the adjacent single crystal silicon advantageously forming a diode extension having desirable properties.
Abstract: A data storage device including: a plastic substrate having a plurality of data volumes arranged along tracks in a plurality of stacked layers; a plurality of micro-holograms each contained in a corresponding one of the data volumes; a plurality of complementary volumes, each corresponding to and being substantially aligned with one of the data volumes; a plurality of micro-holograms each contained in a corresponding one of the complementary volumes; wherein, the presence or absence of a micro-hologram in each of the data volumes is indicative of a corresponding portion of data stored; and, the ones of the complementary volumes corresponding to the ones of the data volumes containing a micro-hologram do not contain a micro-hologram; and the ones of the complementary volumes corresponding to the ones of the data volumes not containing a micro-hologram contain a micro-hologram.
Type:
Grant
Filed:
December 23, 2008
Date of Patent:
December 27, 2011
Assignee:
General Electric Company
Inventors:
Pingfan Peter Wu, Xiaolei Shi, Zhiyuan Ren, Brian Lee Lawrence, John Erik Hershey, Kenneth Brakeley Welles, John Anderson Fergus Ross, Victor Petrovich Ostroverkhov
Abstract: The present disclosure describes a method for managing theme park ride lines by providing an identifying device to a guest, the device configured to uniquely identify the guest, using the identifying device to ascertain an amount of time a guest spends at a predetermined location and reducing the amount of time a guest spends in a line queue for a predetermined ride by the amount of time the guest spends at the predetermined location. A system for managing theme park ride lines is also provided.
Type:
Grant
Filed:
June 16, 2008
Date of Patent:
December 20, 2011
Assignee:
Universal City Studios LLC
Inventors:
Keizo Natsuyama, Steven C. Blum, Justin Michael Schwartz
Abstract: Control devices for configuring heating, ventilating, air conditioning, and cooling (HVAC) systems are provided. The control devices are designed to detect operational parameters of units within HVAC systems and present system configurations consistent with the detected parameters. In response to user selection of a system configuration, the control device may apply the system configuration to the HVAC system and may reconfigure settings of control circuits within system units. The system configurations presented by the control device may correspond to wiring diagrams that are familiar to service technicians. Methods of configuring HVAC systems with the control devices are also provided.
Type:
Grant
Filed:
September 19, 2008
Date of Patent:
December 13, 2011
Assignee:
Johnson Controls Technology Company
Inventors:
Greg R. Harrod, Brian D. Rigg, Nathan T. Ostrye, Jedidiah O. Bentz
Abstract: Disclosed are methods and devices, among which is a method that includes forming a lower conductive material on a substrate, forming a stop material on the substrate, forming a sacrificial material on the substrate, etching the sacrificial material with an etch that is selective to the sacrificial material and selective against the stop material, and etching the lower conductive material.
Abstract: A memory in a sensor is used to store multiple coefficients for a physiological parameter. In one embodiment, not only are the sensor's specific calibration coefficients stored in a memory in the sensor for the formula to determine oxygen saturation, but multiple sets of coefficients are stored. The multiple sets apply to different ranges of saturation values to provide a better fit to occur by breaking the R to SpO2 relationship up into different pieces, each described by a different function. The different functions can also be according to different formulas for determining oxygen saturation.
Type:
Grant
Filed:
September 30, 2005
Date of Patent:
December 13, 2011
Assignee:
Nellcor Puritan Bennett LLC
Inventors:
Paul D. Mannheimer, Michael E. Fein, Marcia Fein, legal representative, Charles E. Porges
Abstract: There is provided fin structures and methods for fabricating fin structures. More specifically, fin structures are formed in a substrate. The fin structures may include two fins separated by a channel, wherein the fins may be employed as fins of a field effect transistor. The fin structures are formed below the upper surface of the substrate, and may be formed without utilizing a photolithographic mask to etch the fins.