Abstract: A feedback circuit is provided for reducing the input impedance of a preamplifier circuit, such as for use with a sensing coil in an imaging system. The feedback circuit permits adjustment of the input impedance by balancing inductive and capacitive components of a feedback control circuit. The imaginary component of the input impedance may be adjusted independently of the real component, to provide a substantially zero input impedance, while allowing adjustment of the stability of the system. The circuitry may function in conjunction with a reactance matching circuit to reduce cross-talk in multiple sensing coil arrangements.

Abstract: A method for performing an atomic read of a memory cell. A plurality of data parts of the memory cell are loaded into a respective first plurality of registers and an atomic compare and exchange operation is executed on the memory cell. The first plurality of registers is read and concatenated forming a value equal to the value of the memory cell. In a first embodiment, a low-order data part of the memory cell is loaded into registers A and B and a high-order data part of the memory cell is loaded into registers D and C. An atomic compare and exchange operation is executed on the memory cell and register A and register D are read and concatenated. In a second embodiment, the contents of register A is loaded into register B and the contents or register D is loaded into register C. An atomic compare and exchange operation is executed on the memory cell and register A and register D are read and concatenated.

Abstract: In a computer system two integrated circuit devices are operatively mounted on the main system board using a pair of interstitial circuit boards sandwiched between the integrated circuit devices and the system board and having substantially smaller footprints than the system board. Each interstitial board has a series of terminating components, representatively resistors, interposed in its circuitry which interconnects the associated integrated circuit board with system board circuitry that, in turn, operatively couples the two integrated circuit boards. The incorporation of the terminating components in the interstitial boards instead of in the system board reduces the circuit complexity of the system board and the required number of layers therein, thereby reducing the cost of the system board and substantially simplifying its signal trace routing design.

Abstract: A computer system having electronic components housed in a central unit having a protective enclosure and a cover. The cover is moveable to provide access to electronic components housed in the central unit. The cover allows access to certain electronic components and prevents access to other electronic components.

Abstract: A connection technique for switchably and mutually exclusively coupling a plurality of device sets. The connection technique utilizes a low profile connector having multiple circuit sets, each of which is configured for mutually exclusive and removable insertion into a receptacle coupled to multiple devices. Each one of the multiple circuit sets, which is inserted into the receptacle, couples a desired set of the plurality of device sets.

Abstract: Possible failure of x-ray tubes is predicted by monitoring and analysis of operating parameters considered leading indicators of failure. Historical data for a tube population is analyzed by discriminant analysis to develop a failure prediction algorithm. The algorithm is used to correlate operating parameters, or values derived from the operating parameters with a potential for tube failure. The operating parameters may include anode overcurrent events and spits, or spit rate exceeded errors for a diagnostic system in which the x-ray tube is installed.

Abstract: Methods of forming a graded layer is disclosed. The graded layer transitions from one material to another material. The properties of these materials are chosen to optimize the interfaces on each side of the graded layer. Specifically, an improved transistor gate stack barrier layer may be formed by disposing an appropriate graded layer between a gate layer and an interconnect layer. In fact, the graded layer may obviate the use of the interconnect layer, as the top of the graded layer may include a highly conductive material. An improved integrated circuit interconnect structure may also be formed by grading the material composition of an interconnect layer.

Abstract: An MRI system is provided with normal and quiet modes of operation. The quiet mode may be selected from an operator station, such as via a graphical user interface. When the quiet mode of operation is selected, configuration parameters are used for the particular pulse sequence to be executed in the examination. The configuration parameters for the quiet mode of operation may be derived from those of the normal mode of operation. The quiet mode of operation may, for example, employ gradient pulses having reduced amplitudes and slew rates as compared to those employed in the normal mode of operation. The reduced amplitudes and slew rates, along with changes in timing of the pulses and between pulses of the pulse sequence of the examination result in reduced acoustic noise for accommodating more sensitive patients.

Abstract: An improved die edge contacting socket incorporates particles of a thermally conducting material into an elastomeric compression pad disposed in the sealing cap of the socket. The elastomeric compression pad is preferably composed of an electrically insulating material, such as a silicone-based gel. The thermally conducting material is preferably either diamond, beryllium oxide, silicon nitride, or a like material.

Abstract: Apparatus and method are disclosed for down scaling performance of a multibus multiprocessor computer system. One or more busses associated with one or more failed processors or devices are disabled to allow operation from remaining busses. If errors or power failure are detected in a processor or bus device the computer system may reboot and, using the apparatus and method of the present invention, the bus associated with the defective processors or devices may be disabled upon reboot. The one or more affected busses may be disabled and the computer system may be brought back up in a single-bus operational mode or a multiple bus operational mode where an alternate bus is designated as the boot bus.

Abstract: A discrete pixel image field of view is expanded by correction of filtered and processed image data. The raw image data is processed through at least one continuous domain filter. Roll off at limits of a linear range of the filter result in loss or degradation of image data in the transition region. The filtered image data is digitized and the resulting values are stored in discrete frequency value bins. Correction values are applied to the image data in the discrete bins of the transition region to correct the filter roll off. At least a portion of the corrected data is added to the field of view data employed in the image reconstruction. The technique permits as much as several percent of the field of view to be recuperated from the transition regions.

Abstract: Titanium-containing films exhibiting excellent uniformity and step coverage are deposited on semiconductor wafers in a cold wall reactor which has been modified to discharge plasma into the reaction chamber. Titanium tetrabromide, titanium tetraiodide, or titanium tetrachloride, along with hydrogen, enter the reaction chamber and come in contact with a heated semiconductor wafer, thereby depositing a thin titanium-containing film on the wafer's surface. Step coverage and deposition rate are enhanced by the presence of the plasma. The use of titanium tetrabromide or titanium tetraiodide instead of titanium tetrachloride also increases the deposition rate and allows for a lower reaction temperature. Titanium silicide and titanium nitride can also be deposited by this method by varying the gas incorporated with the titanium precursors.

Abstract: A method for processing partial lines of image data from a detector, each partial line of data representing a portion of an image pixel matrix, includes: (a) communicating partial lines of image data over a network from an imaging system to a remote facility; (b) receiving partial lines of image data in a first sequence; (c) assigning to each partial line of image data in a first series a position in a second sequence by reference to a plurality of base addresses; (d) altering the base addresses; and (e) assigning to each partial line of image data in a second series a position in the second sequence by reference to the altered base addresses.

Abstract: Annular and linear contact structures are described which exhibit a greatly reduced susceptibility to process deviations caused by lithographic and deposition variations than does a conventional circular contact plug. In one embodiment, a standard conductive material such as carbon or titanium nitride is used to form the contact. In an alternative embodiment, a memory material itself is used to form the contact. These contact structures may be made by various processes, including chemical mechanical planarization and facet etching.

Abstract: Stepped photoresist profiles provide various methods of forming profiles in an underlying substrate. The stepped photoresist profiles are formed in two layers of photoresist that are disposed over the substrate. The substrate is then etched twice using a respective opening in each photoresist layer to create a stepped profile in the substrate.

Abstract: A method and apparatus are disclosed for electrically monitoring processing variations of a material deposited using a collimated process. In one embodiment, the method and apparatus are directed to monitoring variations in step coverage of a conductive material deposited using a collimated sputtering process. A substrate having a plurality of trenches is used to mimic features desired to be monitored, such as contact holes. The resistance of metal deposited into the trenches is monitored to determine the effectiveness of the collimated sputtering process.

Abstract: A method and apparatus are disclosed for electrically monitoring processing variations of a material deposited using a collimated process. In one embodiment, the method and apparatus are directed to monitoring variations in step coverage of a conductive material deposited using a collimated sputtering process. A substrate having a plurality of trenches is used to mimic features desired to be monitored, such as contact holes. The resistance of metal deposited into the trenches is monitored to determine the effectiveness of the collimated sputtering process.

Abstract: A method is provided for determining source-to-image distance (SID) setpoints in a digital imaging system. SID setpoints are determined during a setup and calibration procedure which includes generating radiation beams while varying certain system parameters, such as the radiation source position, and detecting and determining the size of the radiation beams that impact on the digital detector. SID values and a separation gain constant can then be determined based on the calculated sizes of the detected radiation beams and the feedback signals which are representative of the various system parameters that were varied (e.g., source position, etc.) during the setup and calibration procedure. The separation gain constant and the calculated, empirical SID values can then be used to position the radiation source at any user-selected SID based on position sensor feedback signals. The procedure also provides for a calibrated readout of the SID, which can be displayed to a user of the imaging system.

Abstract: A dimmable electrodeless light source includes an electrodeless lamp, an electronic ballast and a dimming module. The light source further includes coupling transformers coupled to the electrodeless lamp for inductively coupling power to the lamp to generate light. An auxiliary winding electromagnetically coupled to the primary winding of at least one of the coupling transformers is driven by switching circuitry in the dimming module. The switching circuitry is pulse width modulated to control the average brightness of the light generated by the electrodeless lamp. An exemplary application for the dimmable electrodeless light source is as a backlight for a video display device, such as a liquid crystal display unit. The dimmable electrodeless light source further includes a magnetic shield device that is operably positioned with respect to the electrodeless lamp.

Abstract: A method and apparatus for reducing latency caused by cumulative point-to-point messaging associated with network performance monitoring in SAN-attached I2O architectures. In a computer system, a performance monitoring OSM associated with a first node generates status request messages to a first multicast ISM residing on a first governor IOP associated with a first node for requesting the status from all nodes. The first multicast ISM generates status request messages to all node 1 devices and node 1 IOPs and to a second multicast ISM residing on a node 2 governor IOP. The second multicast ISM generates status request messages to all node 2 devices and node 2 IOPs. One or more “unhealthy” device response messages may be sent to the performance monitoring OSM containing the TID of the “unhealthy” device to allow a subsequent point-to-point detailed status request message to be issued.