Abstract: A capacitive structure includes two parallel plate capacitors configured for placing between coaxial cables. The first parallel plate capacitor includes an upper conductive plate and a lower conductive plate that are substantially parallel to one another and separated from one another by a first dielectric material. The second parallel plate capacitor includes an upper conductive plate and lower conductive plate that are substantially parallel to one another and separated by a second dielectric material. The lower conductive plate of the first capacitor is engaged against, and thereby connected to, the upper conductive plate of the second capacitor. A conductive clip connects the upper conductive plate of the first capacitor to the lower conductive plate of the second capacitor.

Abstract: A flash memory formed by a process wherein at least two parallel stacked gate strips are formed on a silicon substrate such that the stacked gate strips are separated by field oxide islands. Asymmetrical first and second junctions are formed in each of a set of source/drain regions and a chemical etch is applied to form the field oxide islands into oxide spacers that align a dual-function control line to the first and second junctions. The resulting flash memory includes a plurality of stacked gate islands, one or more source/drain regions between at least a subset of the plurality of stacked gate islands, first junctions in each of the source/drain regions, second junctions in each of the source/drain regions and dual function control lines in the source/drain regions.

Abstract: A method for detecting white matter neural injury and predicting neurological outcome for a patient, comprises acquiring EEG signal(s) from the surface of the head of the patient, and analyzing the frequency distribution or content of the signal(s) to produce output information indicative of cerebral white matter injury for the patient. Loss or reduction of activity in the upper portion or spectral edge of the EEG frequency domain particularly in the immature brain is predictive of neural dysfunction. A system for detecting white matter neural injury and predicting neurological outcome for a patient is also described.

Abstract: A method and apparatus provide for etching a semiconductor wafer using a two step physical etching and a chemical etching process in order to create vertical sidewalls required for high density DRAMs and FRAMs.

Abstract: A food mixer includes a whipping attachment 60. The attachment includes an elongated impeller 20 that engages a drive of the mixer at the lower surface of a container 10. The attachment also includes a plurality of nested wire-shaped elements 22 attached to a side of the impeller. Because the elements are nested, they travel at a different angular velocities resulting in improved whipping, agitating and mixing characteristics.

Abstract: Method and apparatus for etching a silicide stack including etching the silicide layer at a temperature elevated from that used to etch the rest of the layers in order to accomplish anisotropic etch.

Abstract: A shaving system for use with mechanical hand-held shavers includes a housing in which is disposed a DC motor, an eccentric weight coupled to a shaft of the motor, and a DC power source. The eccentric weight and motor shaft are oriented such that the axis of vibrations produced by the motor are parallel to an axis of the cutting edge of a razor blade attached to a handle in mechanical vibratory communication with the motor. The result is vibratory displacement of the razor blade, typically back-and-forth, over a range approximating the dimension of a human hair. In one embodiment a housing accepts the handle of a generic shaver, and in a second embodiment the housing is bifurcated and the handle of a shaver.

Abstract: A collimator system is disclosed for use in an in-line pass-by sputtering system during the fabrication of recording media to improve the data storage density and read/write performance characteristics of the media. The collimator system includes a collimator shield and a collimator honeycomb. The shield includes a rectangular tube having a flange and a frame at inner and outer ends, respectively. The various components of the shield in part serve to prevent possible contamination of substrates due to target atom accumulation on the chamber walls during the sputtering process. The collimator honeycomb is provided for blocking target atoms from contacting the substrate at low incident angles. The collimator honeycomb is comprised of a plurality of collimators which are identical to each other. In a preferred embodiment, the collimators have a hexagonal cross-section taken from a perspective perpendicular to the substrate. The collimators may also have other geometric shapes.

Abstract: A spine distraction implant alleviates pain associated with spinal stenosis and facet arthropathy by expanding the volume in the spine canal and/or neural foramen. The implant provides a spinal extension stop while allowing freedom of spinal flexion.

Abstract: A method and computer-readable medium is provided for designing control software for a module in a self-reconfigurable robot. A genetic method randomly selects a plurality of module software functions for creating a plurality of module control software programs. The plurality of control software programs are then evaluated against a series of tasks and respective fitness functions. The module control software is selected based on the software program having the highest fitness function value for a particular task.

Abstract: Improved targets for use in DC magnetron sputtering of nickel or like ferromagnetic face-centered cubic (FCC) metals are included for forming metallization films having effective edge-to-edge deposition uniformity of 5% (3&sgr;) or better. Such targets may be characterized as having: (a) a homogeneous texture mix that is at least 20% of a <200> texture content and less than 50% of a <111> texture content, (b) an initial pass-through flux factor (% PTF) of about 30% or greater; and(c) a homogeneous grain size of about 200 &mgr;m or less.

Abstract: A method for detecting the presence of signal channels in a wavelength-multiplexed optical signal comprises the steps of providing an initial estimate of channels to obtain a coarse spectral match, performing a coarse nonlinear deconvolutional algorithm on the wavelength-multiplexed optical signal, and finding peak power levels of the signal in the initially estimated channels. The signal channels are selected from the initially estimated channels based upon the peak power levels. In an embodiment, power levels in the signal channels of the wavelength-multiplexed optical signal are determined with refined accuracy by performing a fine nonlinear deconvolutional algorithm. In a further embodiment, the coarse and fine nonlinear deconvolutional algorithms are performed by using Jansson's nonlinear iterative method. The method is applicable to the testing of wavelength-multiplexed optical signals generated by broadband dense wavelength division multiplexers (DWDMs) and other optical communications devices.

Abstract: Configurable interconnect resources of field programmable gate arrays (FPGA's) are tested by configuring at least some of the lookup tables (LUT's), registers and input signal acquirers to implement one or more sequential state machines that feed back their current states via at least some of the interconnect conductors to the inputs of the LUT's. The fedback signals are decoded by the LUT's for defining next-states of the one or more sequential state machines. Each sequential state machine may be programmed to sequentially step through a number of unique states, where the unique states challenge capabilities of the interconnect conductors to toggle through combinations of different signal levels. The sequential state machines are exercised to sequentially step through plural ones of their unique states.

Abstract: A bank selector circuit for a simultaneous operation flash memory device with a flexible bank partition architecture comprises a memory boundary option, a bank selector encoder coupled to receive a memory partition indicator signal from the memory boundary option, and a bank selector decoder coupled to receive a bank selector code from the bank selector encoder. The decoder, upon receiving a memory address, outputs a bank selector output signal to point the memory address to either a lower memory bank or an upper memory bank in the simultaneous operation flash memory device, in dependence upon the selected memory partition boundary.

Abstract: A food processor having a container and a drive shaft extending through a bottom thereof includes a processing device having an impeller 20 for engaging the drive shaft and a dome-shaped cap or shield 90. The cap includes dimples on a lower surface to assist in breaking up lumps of food in the container. The processing device can rotate in either a clockwise or counterclockwise direction.