Abstract: A handle having a handle body, a latching arm, and a pivot block is provided. The handle body has a release finger and a pivot leg. The latching arm is slideably secured to the handle body. The pivot block is connectable to a device having at least one movable component. The pivot block is also connected to a first portion of the pivot leg so as to allow the handle body to rotate in the pivot block about the first portion between a first position and a second position. The first position is a locked position and the second position is a latched position.

Abstract: Method and means to provide a mechanism by which a hypervisor can permit a real machine to interpretively execute certain I/O instructions independently of the value of an I-bit in the subchannel. This is necessary as the I-bit covers all I/O instructions that can be interpretively executed; however, there can be instances where the hypervisor cannot allow the interpretive execution of other I/O instructions but can permit the interpretive execution of the SIGA instruction.

Abstract: A docking apparatus for printed circuit boards including a cassette housing, having a housing base, a housing cover and a housing wall, wherein the housing base and the housing wall are disposed relative to each other so as to define a housing cavity for containing a printed circuit card and wherein the housing wall includes a cable opening disposed so as to be communicated with the housing cavity, a housing bezel, disposed relative to the cassette housing so as to be associated with the cable opening, the housing bezel includes an outer bezel having a first plurality of openings and an inner bezel having a second plurality of apertures, the inner bezel in electrical communication with the printed circuit card, wherein said housing bezel is removable, and an EMC gasket disposed between the outer and inner bezels of said housing bezel, the EMC gasket configured to provide a removable EMC seal proximate the cable opening while still allowing airflow through the first and second plurality of apertures having the

Abstract: A method of multicasting messages in a computing network environment having at least one host and a plurality of clients connected and in processing communication with one another via a gateway device. Host(s) and client(s) requesting registration will be registered and their information will be entered in a routing table, one entry dedicated to each host or client. A connectivity platform controls all communication between the host and the client(s) by receiving all information packets. The Routing table is then searched and the packets are distributed accordingly to their owner once a matching entry is found. If a matching entry is not found the packet will be dropped.

Abstract: A refrigeration system includes an evaporator housing sealed to a first side of a circuit board containing a logic module, the evaporator housing including an evaporator block in thermal communication with the logic module. The evaporator housing further includes at least a humidity sensor for detecting a humidity within the evaporator housing. In another aspect of the invention, the refrigeration system includes a heater on a second side of the circuit board opposite the evaporator housing, the heater being in thermal communication with plated through-holes of the circuit board to maintain the circuit board above local ambient temperature. In another aspect of the invention, a source of dry pressurized air is provided into the sealed evaporator housing through a though-hole drilled directly under the logic module.

Abstract: An electronic enclosure assembly having a logic chassis, a forward extension member attached to one end of the logic chassis wherein each side of the forward extension member has side pieces, each of the side pieces having a face and a notch. The enclosure further includes a removable chassis having a front side and a rearward side and sized to fit between the side pieces and slidably movable on the extension until it is engaged with the logic chassis. An activation handle having side members is pivotally attached on the sides and at front end of the removable chassis and is movable between an up position and a down position. The ends of the side members and the notches of the side pieces of the logic chassis cooperate for camming the removable chassis into engagement with the logic chassis when the activation handle is moved to its up position and for camming the removable chassis away and disengaging the removable chassis from the logic chassis when said activation handle is returned to its down position.

Abstract: A distributed control method and distributed processing system to decrease data communication overhead and to execute a program efficiently. One of processors at which data arrives in a multiprocessing system is selected by a polling process (310 to 312). All data which arrives at the selected processor is received therefrom to fill a control table of sending and receiving data and a control table of calculation sets with marks for indicating the completion of data receipt (314 to 316). Data to be sent is sent so that the control table of sending and receiving data is marked to indicate the completion of data sending (318 to 320). If data has not yet arrived during polling, required data is sent to all processors (322). The execution of actual calculations using array processes is effected by using calculation sets such that the control table of calculation sets is marked indicating the completion of calculation.

Abstract: A stride enhancer provides high memory bandwidth on strides greater than one and minimizes requests to memory. The basic memory module (BSM) design uses line fetches as the basic cache complex fetch mechanism and allows operation of the BSM to be stride independent. In the preferred implementation, the BSM has two fetch modes; a normal mode and a line fetch mode. In the normal mode, a quadword (QW) is fetched as in the conventional design. In the line fetch mode, all double words (DWs) within the referenced line are returned to the storage control element (SCE) at two DWs per cycle for strides one through eight (twice the conventional bandwidth) or at least one DW per cycle for all other strides (equal to the conventional bandwidth). This is accomplished with two DW busses rather than a single QW bus and by interleaving DW storage locations within the BSM. In line fetch mode for strides one through eight, DWs are read out according to the stride on the two DW busses.

Abstract: Disclosed is a tester valve having a ball valve rotatable between the open and closed positions for use with a test string to test an oil well. The apparatus includes a ball closing piston in the valve operating mechanism which assists in rotating the ball to the closed position. One side of the ball closing piston is exposed to a first pressure of formation fluid flowing through the interior of the test string on the upstream side of the ball valve. The other side of the piston is exposed to a second pressure which is lower than the first pressure by a pressure drop caused as the fluid flows through the apparatus past the ball being rotated to the closed position. A bypass mechanism is additionally disclosed which is operable for equalizing the pressure on both sides of the ball closing piston when the ball is being rotated to the open position.