Abstract: Received portion of message is stored persistently and transmitted without awaiting receipt of another portion of the message and without generating a new message. The storing and transmitting can occur substantially simultaneously and be performed by one or more hardware elements. Originator of the message can choose whether to indicate indication of broadcasting of the message. First hardware element can determine local acknowledgement for message and second hardware element can determine determinative signal of the local acknowledgement and at least one of: one or more collected intended recipient acknowledgements for the message; and one or more collected determinative signals of intended recipient acknowledgements for the message.

Abstract: Hybrid lock and unlock capabilities are provided for a threaded computing environment. For example, kernel locking services are selectively employed in conjunction with functions in the POSIX threads standard to provide a lock capability and an unlock capability. The hybrid approach determines which lock scheme to employ by evaluating whether one thread or multiple threads concurrently desire a resource lock. When only one thread desires the lock, the thread is directly assigned resource ownership employing one of an operating system primitive lock process or a hardware lock process. An alternate lock process is used to obtain resource ownership when multiple threads concurrently desire the lock. This alternate process employs at least one function in the POSIX threads standard to implement a queue of waiting threads. A similar hybrid approach to the unlock capability is also provided.

Abstract: Hybrid lock and unlock capabilities are provided for a threaded computing environment. For example, kernel locking services are selectively employed in conjunction with functions in the POSIX threads standard to provide a lock capability and an unlock capability. The hybrid approach determines which lock scheme to employ by evaluating whether one thread or multiple threads concurrently desire a resource lock. When only one thread desires the lock, the thread is directly assigned resource ownership employing one of an operating system primitive lock process or a hardware lock process. An alternate lock process is used to obtain resource ownership when multiple threads concurrently desire the lock. This alternate process employs at least one function in the POSIX threads standard to implement a queue of waiting threads. A similar hybrid approach to the unlock capability is also provided.

Abstract: Messages are sent from a primary node of a computer system to one or more distribution nodes of the system. Each of the distribution nodes then further sends the message to one or more other nodes of the computer system. After receipt of the message, the other nodes forward an acknowledgement to the particular distribution node, which sent the message. The distribution nodes collect their respective acknowledgements, and when all of the expected acknowledgements are received by a distribution node, the distribution node sends one acknowledgement to the primary node. The one acknowledgement indicates receipt of the message by the other nodes.

Abstract: A complex task is managed by controlling the independent, cooperating components that make up the complex task. This control includes, for instance, pre-run dynamic validation of the components of the complex task; programmatic determination of the proper order to start, stop or delete one or more of the components; post-run automatic recovery from a terminated component; and/or automatic collection of information regarding the independent, cooperating components, such that the overall status of the complex task is obtained and understood. The control is provided through a centralized mechanism that enables easy configuration, control and monitoring of the independent, cooperating components of a complex task.

Abstract: A quiesced and synchronous distributed data processing system includes a primary node, a secondary node and a switch between the primary and secondary nodes. The TOD for the primary node is set depending on the system. The invention sets the TOD for the switch based on the TOD of the primary node. The primary node then verifies the switch TOD. If verified, the TOD for the secondary node is set, based on the TOD of the primary node. Finally, the secondary node self-verifies its TOD.

Abstract: A self-timed link between two elements in a computer system is initialized. Each element sends an initialization request to the other. If successfully received, the elements exchange signals with oscillation-free segments over multiple clock cycles. If successful, the elements indicate to each other that initialization is complete. Optionally, a link operation parameter can be sent with the initialization complete indication for post-initialization link control.

Abstract: A self-timed link between two elements in a computer system is initialized. Each element sends an initialization request to the other. If successfully received, the elements exchange signals with oscillation-free segments over multiple clock cycles. If successful, the elements indicate to each other that initialization is complete. Optionally, a link operation parameter can be sent with the initialization complete indication for post-initialization link control.

Abstract: An adapter card in a computer system includes an application specific integrated circuit (ASIC) and a field programmable gate array (FPGA) coupled to the ASIC. Random data is provided to the ASIC logic function(s) by control of the FPGA, which is configured by a programmable logic device on the card and coupled thereto. The logic function(s) of the ASIC is then exercised with the random data, and the output is compared with expected output by the system to determine if there are any errors. The determination is made based on a signature produced by a multiple input shift register (MISR) within the ASIC, based on the output data from the logic function(s). The FPGA can then be reconfigured for normal adapter card functions.