Patents Represented by Attorney, Agent or Law Firm Frohwitter
  • Patent number: 5999743
    Abstract: A computer system having a core logic chipset that functions as a bridge between an Accelerated Graphics Port ("AGP") bus device such as a graphics controller, and a host processor and computer system memory wherein a Graphics Address Remapping Table ("GART table") is used by the core logic chipset to remap virtual memory addresses used by the AGP graphics controller into physical memory addresses that reside in the computer system memory. The GART table enables the AGP graphics controller to work in contiguous virtual memory address space, but actually use non-contiguous blocks or pages of physical system memory to store textures, command lists and the like. Contiguous virtual memory address space must be allocated for the AGP device within the addressable memory space of the computer system, typically 4 gigabytes using 32 bit addressing.
    Type: Grant
    Filed: September 9, 1997
    Date of Patent: December 7, 1999
    Assignee: Compaq Computer Corporation
    Inventors: Ronald T. Horan, Phillip M. Jones, Gregory N. Santos, Robert Allan Lester, Robert C. Elliot
  • Patent number: 5997231
    Abstract: A self-aligning, anti-cross threading fastener having first and/or second members with lead threads having a curved surface feature from the minor diameter to the major diameter which allows the surface of the lead threads to cam over the mating threads of the other member and thereby aligning collinearly the longitudinal axis of the two members. The initial presentation angle of the two threaded members may be restricted and therefore enhanced by providing a protruding diameter feature.
    Type: Grant
    Filed: November 16, 1998
    Date of Patent: December 7, 1999
    Inventors: Jerry J. Goodwin, Michael A. Garver, Anthony L. Snoddy
  • Patent number: 5993740
    Abstract: Magnetic particles are used as the solid phase to carry out immunoassay. In a reaction vessel, the magnetic particles are mixed with a sample containing TSH as an analyte and a labeled antibody. A chemiluminescent label material is bound onto the magnetic particles with an immunoreaction. A fluid including the above mixture is introduced to a chamber inside a flow through cell, the chamber being sized to have a width greater than a depth. The magnetic particles in the fluid are trapped by a magnet so as to be spread in the planar form over a predetermined area within the chamber, while useless materials are discharged outwardly of the chamber. The chamber is then filled with a buffer solution containing an attractant. By applying a voltage to electrodes disposed in the chamber, the label material on the magnetic particles is excited to emit an electro-chemiluminescence. The luminescence is detected by a photomultiplier.
    Type: Grant
    Filed: July 17, 1997
    Date of Patent: November 30, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Yasushi Niiyama, Hiroyasu Uchida, Ryuji Tao
  • Patent number: 5991830
    Abstract: A system for allowing a peripheral device to be inserted directly into a port of a computer system while the computer system is powered on. The insertion of a peripheral device into the computer system port is automatically detected, and a configuration operation is automatically performed when insertion of the peripheral device is detected. The system also allows a plurality of peripheral devices to be connected to a single port of a computer system by automatically determining the number of peripheral devices and assigning a unique address to each of the peripheral devices. The peripheral device may have a host port for communicating with the computer system, a slave port for connecting to a slave device, and a device manager which identifies if a slave device is connected.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: November 23, 1999
    Assignee: Compaq Computer Corp.
    Inventors: Paul F. Beard, Mark D. Moore
  • Patent number: 5991798
    Abstract: Information obtained through a network and information distributed from a package medium are mixedly displayed. A package medium 3 has a URL (Universal Resource Locator) and information for converting a directory structure in the package medium. A terminal has information for managing correspondence between data of a received electronic mail 6 and a URL of the data. The URL is used for designating data. When the designated URL exists in the terminal, data is read from the terminal. When the designated URL exists in the package medium, data is read from the package medium. The read data is mixedly displayed on one screen.
    Type: Grant
    Filed: May 16, 1997
    Date of Patent: November 23, 1999
    Assignees: Hitachi, Ltd., Hitachi Information Network, Ltd.
    Inventors: Tomochika Ozaki, Tadashi Kuwabara, Toshiyuki Oda, Mika Nishiyama, Takashi Takeuchi, Jun Miyauchi
  • Patent number: 5987747
    Abstract: An engine which employs a cam follower mechanism to reduce wear and reduce the size of an assembled engine. The cam follower mechanism utilizes guide rails located to reduce side thrust on the valve stem. The engine employs a high speed quill shaft to synchronize independent cam shafts existing in each of a plurality of interconnected engines. The engine is assembled using a single size fastener to provide a uniform stress gradient within the engine. The engines are interconnected utilizing O-ring seals. The engine provides a piston crown utilizing a connecting rod directly connected to the bottom surface of the piston crown. The piston crown is stabilized along the longitudinal cylinder axis by a rail guide. Connecting rods are provided which require less than one hundred eighty degrees (180.degree.) circumference of a crankshaft pin for support so that a plurality of connecting rods can be associated with a single crankshaft pin.
    Type: Grant
    Filed: July 25, 1997
    Date of Patent: November 23, 1999
    Assignee: Evestar Technologies, Inc.
    Inventor: Alex Pong
  • Patent number: 5991910
    Abstract: A free-running microcontroller (i.e., one without any reset signal) is shown with special mode enable detect logic for placing the microcontroller into the test or special operations mode, without the benefit of a dedicated pin for such purposes. Rather, the instant invention implements the methodology of first applying a test voltage to indicate to the free-running microcontroller that the test mode is to be entered. Since the device has no reset signal to interrupt normal operation once it has begun, the test voltage is applied before the power supply V.sub.DD to ensure that the device enters test mode before it can enter normal operation.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: November 23, 1999
    Assignee: Microchip Technology Incorporated
    Inventors: Richard L. Hull, Scott Ellison, Paul Hofhine
  • Patent number: 5991196
    Abstract: An improved reprogrammable memory device permits definition of a page within an array of memory cells which is variable in size, erasure of only that data contained within the defined variable page while uneffecting the remaining data in the array of memory cells and reprogramming the defined variable page.
    Type: Grant
    Filed: December 16, 1997
    Date of Patent: November 23, 1999
    Assignee: Microchip Technology Incorporated
    Inventors: Joseph A. Thomsen, Timothy J. Phoenix, Brian Boles, Henry Pena, Gordon E. Luke
  • Patent number: 5986677
    Abstract: A computer system having a core logic chipset that functions as a bridge between an Accelerated Graphics Port ("AGP") bus device such as an AGP graphics controller, and a host processor and computer system memory wherein AGP transaction read requests are merged from the AGP graphics controller and retired when these requests are within a cacheline of the memory being accessed. The core logic chipset will request a memory cacheline read as it begins processing a current AGP transaction read request. Once the memory read access is initiated, the transaction read request will be popped off an AGP request queue in order to evaluate the next in order transaction request. If the next request can be partially or completely retired by the memory read access previously started, then the memory access that would have been normally required may be skipped and the data from the previous memory read access is used instead.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: November 16, 1999
    Assignee: Compaq Computer Corporation
    Inventors: Phillip M. Jones, Ronald T. Horan, Gregory N. Santos
  • Patent number: 5987583
    Abstract: A system for allowing multiple addressing modes while maximizing a number of available opcodes and addressable registers. The system has a processor architecture scheme which allows for encoding of multiple addressing modes through use of virtual register addresses. The system has an instruction set having a plurality of instructions. Each instruction has a plurality of bits wherein none of the plurality of bits in each of the plurality of instructions are dedicated bits for implementing different addressing modes. Each of the plurality of instructions are able to implement different addressing modes by addressing the virtual register addresses in the processor architecture scheme. Since no bits are required for implementing different addressing modes, the length of the opcode field and the register address field are determined by the number of opcodes and the number of addressable registers the user wishes to implement.
    Type: Grant
    Filed: October 29, 1997
    Date of Patent: November 16, 1999
    Assignee: Microchip Technology Inc.
    Inventors: Joseph W. Triece, Sumit K. Mitra
  • Patent number: 5985084
    Abstract: A polymeric wave guide comprises a first layer of a polymer having a first refractive index, and the first layer contains retaining features or groves which will accept a second polymer. A second polymer is curable and is used to fill the retaining features has a refractive index which is greater than the polymer used to produce the first layer. The retaining features of the first polymeric layer are filled with the second polymer by pressing the second polymer into the retaining features by applying an advancing force to a flexible dispensing layer; this results in filling the retaining features and producing a thin over layer having a thickness of less than 1.5 .mu.m of the second polymer over the surface of the first layer. The method further comprises a step in which the second polymer is cured.
    Type: Grant
    Filed: May 23, 1996
    Date of Patent: November 16, 1999
    Assignee: Epigem Ltd.
    Inventors: Philip Summersgill, Thomas Grierson Harvey, Timothy George Ryan, Neil Carter, Andrew John Thorne
  • Patent number: 5979475
    Abstract: A highly clean fluid treatment system having a small system volume is provided by using a Bernoulli holder to accomplish stable holding of a specimen in a simple configuration. A holder having a specimen hold face formed almost the same as a specimen or having a Bernoulli effect producing region and a region surrounding the Bernoulli region made of a specific combination of materials is used and fluid supply sources are connected to the holder for supplying one or more fluids containing a treatment agent of a specimen. Since a force for inhibiting a position shift occurs on the end face of the specimen 10, stable specimen holding is enabled. The space between the specimen and the holder where treatment is executed is narrow and fluid always flows from the treatment space to the outside. Therefore, the fluid treatment system of a small volume producing high treatment efficiency and minimizing the chances of recontamination of the specimen can be provided.
    Type: Grant
    Filed: April 28, 1995
    Date of Patent: November 9, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Takao Satoh, Haruo Itoh, Hitoshi Oka, Yoichi Takahara, Akio Saito
  • Patent number: 5979227
    Abstract: A system for detecting fugitive emissions including emissions from valves and bolted flange connections. The system may include: (1) enclosures, for example, for valves and pipe flange connections, and (2) a detector in communication with said enclosures.
    Type: Grant
    Filed: August 13, 1996
    Date of Patent: November 9, 1999
    Assignee: Fedd Systems, Inc.
    Inventors: Rick A. Lawson, Michael S. Kelly
  • Patent number: 5976591
    Abstract: A method of cooking food comprising the steps of a) i) measuring the mass of the food and placing the mass in a first receptacle (10) forming a container; or ii) placing the food in a first receptacle and measuring the combined mass of the food plus the first receptacle; or iii) measuring the mass of the food; b) placing the food, optionally together with the first receptacle of step a) in a second receptacle (16); c) raising a liquid such as water to a predetermined temperature, and in particular boiling temperature; d) as a function of a pre-established relationship between the mass of the food, or between the combined mass of the food plus the first receptacle, and the desired mean cooking temperature, determining a quantity of the water at predetermined temperature; e) placing the quantity of water inside the second receptacle, in thermal contact with the first receptacle; and f) cooking the food for a predetermined length of time, wherein the food is cooked by heat transfer between the water, the first r
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: November 2, 1999
    Inventor: Jorge Vieira Da Silva
  • Patent number: 5976664
    Abstract: The description is given of a molding, in particular for furniture and particularly for seating furniture, which has at least one surface with a number of curves and which consists of a multi-layered material with fibers. According to the invention, a multiplicity of slits are arranged in the at least one curved surface of the molding such that the slits can take up the change in the dimensions of the material in relation to the non-deformed state, with the result that an essentially stress-free state can be achieved without damage to the outer layers of the material in the region of the curved surface.
    Type: Grant
    Filed: March 18, 1997
    Date of Patent: November 2, 1999
    Inventor: Hartmut Lohmeyer
  • Patent number: 5974475
    Abstract: A method for allowing flexible multiple access to a serial bus by a plurality of circuit boards. Before a circuit board can be used on a common serial bus with other circuit boards, a unique software address must be assigned to each circuit board. The unique software address is assigned by having a bus master device issue Assign Address commands which utilizes a unique serial number which is stored on each circuit board. The Assign Address command queries each of the circuit boards coupled to the serial bus and assigns a unique software address to each circuit board that fully responds. The Assign Address command is repeated for each circuit board on the serial bus until all of the circuit boards on the serial bus have been assigned a unique software address.
    Type: Grant
    Filed: June 24, 1997
    Date of Patent: October 26, 1999
    Assignee: Microchip Technology Incorporated
    Inventors: John Day, Nathan John, Bruce Negley, Shannon Poulin
  • Patent number: 5974438
    Abstract: A computer system comprising at least one processor and associated cache memory, and a plurality of registers to keep track of the number of cache memory lines associated with each process thread running in the computer system. Each process thread is assigned to one of the plurality of registers of each level of cache that is being monitored. The number of cache memory lines associated with each process thread in a particular level of the cache is stored as a number value in the assigned register and will increment as more cache memory lines are used for the process thread and will decrement as less cache memory lines are used. The number value in the register is defined as the "process thread temperature." Larger number values indicate warmer process thread temperature and smaller number values indicate cooler process thread temperature. Process thread temperatures are relative and indicate the cache memory line usage by the process threads running in the computer system at a particular level of cache.
    Type: Grant
    Filed: December 31, 1996
    Date of Patent: October 26, 1999
    Assignee: Compaq Computer Corporation
    Inventor: E. David Neufeld
  • Patent number: 5967209
    Abstract: A transparent shield is attached to a template and workpiece and used to move the workpiece against an inverted router blade. The transparent shield prevents inadvertent contact of fingers or hands with the router blade, yet allows visual observation of the workpiece proximate to the router blade. A router table may support the workpiece being cut by the router blade. Handles may be attached to the transparent shield for holding thereof. Sensors in the router table may determine the position of the transparent shield in relation to the router blade and the router blade may be stopped if the transparent shield is not covering the router blade. A video camera may be positioned over the router table. The router table, router blade and transparent shield images may be tracked in relation to one another such that if the transparent shield is not covering the router blade, then the router blade may be stopped.
    Type: Grant
    Filed: February 8, 1999
    Date of Patent: October 19, 1999
    Assignee: Fukuda, Inc.
    Inventor: Mark Sei-Ichi Fukuda
  • Patent number: 5957128
    Abstract: The invention relates to a method and a device for determination of functional residual capacity (FRC) by introduction of helium or another inert gas mixture. According to the invention, a measurement apparatus measures the density of the gas mixture upon inspiration and upon expiration at the mouthpiece of a tube or at a mask during forced ventilation of a patient over a plurality of respiratory cycles. The FRC is determined from the difference in the gas concentrations.
    Type: Grant
    Filed: April 23, 1997
    Date of Patent: September 28, 1999
    Inventors: Karl-Heinz Hecker, Rudolf Schinagl, Thomas O.F. Wagner
  • Patent number: 5958039
    Abstract: The stack pointer is used for generating the next unutilized location in the stack memory device in order to indicate where a current value in the program counter is to be written. The stack pointer also generates a directly preceding location to the next unutilized location in order to read the last value of the program counter that was written to the stack memory device. The stack pointer will select the next unutilized location in the stack memory device for a write operation and the directly preceding location to the next unutilized location in the stack memory device for a read operation. The stack pointer will further perform either a post increment or post decrement operation on the next unutilized location in the stack memory device after execution of a current instruction.
    Type: Grant
    Filed: October 28, 1997
    Date of Patent: September 28, 1999
    Assignee: Microchip Technology Incorporated
    Inventors: Stephen Allen, Igor Wojewoda