Abstract: A tapped digital shift register suitable for use with a finite-impulse-response (FIR) filter in applications such as high-definition television is implemented using a random-access memory (RAM). The RAM contains x words having yz bits each, where x represents the number of elements in each section of the shift register, y represents the number of taps and z represents the number of bits in each element. Words are continuously read from and written back into the RAM. Before being written back, each word is modified by removing a z-bit portion from one end and appending a z-bit portion representing new information to the other end. The shift-register architecture disclosed is particularly suited for implementation on very-large-scale integrated circuits together with the FIR filter circuits.

Abstract: A logic circuit simulator for detecting a spike condition at the output of a simulated gate. A plurality of autonomous devices are arranged for parallel pipeline operation. Each device is designed to perform only a part of the overall simulation function. One of the devices is responsive to signals representing gate input stimuli and to gate propagation delay data primarily for performing the spike analysis function. Another device performs the function of gate output signal scheduling in response to gate input stimuli for transmitting messages containing said signals to the spike analyzing device and other devices of the simulator. When the spike analyzing device detects a spike condition, it transmits into the pipeline signals indicating the scheduling of an unknown output event on the gate in question.

Abstract: A force balancing method and apparatus detects small changes in force or pressure. An LC tuned circuit having a capacitor with at least one movable plate senses force or pressure changes. Deviations in the phase of the response of the tuned circuit are compared to the phase of a driving reference oscillator to generate an error signal. The error signal is used to control the oscillator to increase or decrease its output amplitude for driving the tuned circuit. As a result the electrostatic force across the capacitor plates tends to change in such a way as to precisely balance the effect of external force or pressure changes. The system therefore operates in a force-balance mode and in such a way as to provide a high sensitivity together with a precisely controlled stiffness. This system is particularly applicable to high sensitivity microphones, micro-topography, and atomic force microscopy.

Abstract: Disclosed are methods of controlling the adjustment of a machine-adjustable component in a circuit wherein a feedback factor relates a change in a monitor parameter to a compensating change in the value of the adjustable component; and wherein, by machine means, a value for the change in the monitor parameter is determined, a target value for the adjustable component is calculated from the monitor parameter change and the feedback factor, and the adjustable component is adjusted to substantially its target value.

Abstract: Method and apparatus are disclosed for determining a parameter of a clad optical fiber from the scattering angle at the maximum of a modulation component in a forward far-field scattering pattern produced by directing a monochromatic coherent light beam at the fiber. One such parameter is the ratio between core radius and cladding radius.

Abstract: A shadow mask particularly useful in ion implantation processes is disclosed. The mask is fabricated by doping a surface region of a semiconductor wafer to render that region resistant to a particular etchant, machining cavities in the surface of the wafer opposite the doped surface to a depth that does not quite reach the doped region, forming pattern openings in the webs remaining across the ends of the cavities, and thinning the webs by exposure to the particular etchant until the undoped material in the webs is removed. Thus, the ultimate thickness of the webs is controlled substantially by the doping depth.

Abstract: An improved method and apparatus are disclosed for monitoring relative movement between an incident beam of substantially coherent light and a grating on which the beam is directed, wherein light from the beam passing through the grating is sensed by a photodetector, and the cycles in the photodetector output signal are counted. The improvement comprises patterning the beam, transforming the patterned beam into a Fraunhofer diffraction pattern, and further diffracting the Fraunhofer diffraction pattern with the grating to cause an interference image, which is detected by the photodetector. Each two cycles in the output signal of the photodetector then correspond to a relative movement of the beam past one grating period.

Abstract: Parameters of a clad optical fiber are measured by irradiating the fiber with a laser beam to generate a scattering pattern. Measurements are made of fringes and modulations in the scattering pattern and these measurements are translated into such parameters as core and fiber diameter.

Abstract: Method and apparatus for generating amplitudes of picture points in a line-by-line picture signal for a display device from subpicture information encoded as coefficients of a Hadamard transform. Amplitudes of the picture points in a line are determined by generating selected elements of a basis vector associated with each coefficient in a Hadamard matrix and, for each element, forming a product of the coefficient and a factor determined according to the value of the element. Each element and the product determined therefrom relate to a picture point. All the products for each picture point are added to give the amplitude for that point.

Abstract: Device leads are compliantly bonded and external leads are directly bonded to a substrate with a single stroke of a bonding tool. The external leads are comprised in a lead frame that includes a compliant medium portion for bonding the device leads.

Abstract: Digital logic apparatus for demodulating a received phase-modulated carrier wave wherein phase-shifts between successive signalling intervals encode data elements. A shift register serially stores periodic samples of a squared version of the received wave. Exclusive-OR gates compare pairs of stored wave samples, each pair comprising a sample from a previous signalling interval and a sample from a current signalling interval. At least one of the exclusive-OR gates derives synchronizing signals for a local timing generator. For each data element, an integrator is associated with one of the exclusive-OR gates to accumulate a count related to the time during which pairs of similar samples are sensed by its exclusive-OR gate during each signalling interval. The integrator registering the highest count at the end of a given data interval signifies the data element received during that interval.

Abstract: Digital logic apparatus for synthesizing a phase-modulated carrier wave wherein phase shifts between successive carrier-wave segments encode data elements. Carrier-wave segments having different phases are stored in the form of digitally encoded samples in a memory. A digital-to-analog converter is connected to convert sequentially read samples of selected segments into the phase-modulated carrier wave. A combinational logic circuit selects each segment to be addressed according to an applied data element and the phase of the previously selected segment. Means are provided to overlap and blend successively addressed segments to provide smooth phase transitions in the synthesized wave.