Abstract: This invention discloses a multiple quantum well infrared detector comprising a series of alternating layers of blocking layers and composite well layers. Each composite well layer is comprised of alternating layers of GaAs and AlGaAs forming a tightly coupled well group. The tightly coupled well group allows more allowed states for an electron released from the valence bands of the gallium arsenide semiconductor material. Consequently, there is a wider band width of detectable infrared radiation by the composite wall structure over the single well of the prior art.

Abstract: An equalization method is provided for compensating for variations in the characteristics of individual analog-to-digital converters found in a time interleaved analog-to-digital converter circuit. One of a plurality of converters is chosen as a reference converter. Individual characteristics of the remaining converters are compared with the reference converter to provide differential responses therewith. The differential responses are equalized to provide compensation for variations in gain, offset, phase/frequency response, and timing found amongst the plurality of time interleaved converters.

Abstract: An RF backplane for interconnecting a plurality of electronic components. The backplane is housed in a rack which is installed in a vehicle such as an airplane. The backplane includes a fixed frame fixedly mounted in the rack and at least one removable frame aligned with and removably attached to the fixed frame. Upon removal of the removable frame and electronic components attached thereto, complete access is afforded to the backplane and various components interconnected thereto without removal of the rack from the vehicle.

Abstract: An analog-to-digital converter employing a reference resistor ladder is disclosed for quantizing a differential analog input signal into quantization levels and converting each level into binary output code and requiring comparators having only two inputs. The converter receives positive and negative portions of a differential analog input signal. A first resistive network having a plurality of resistors of equal resistance spreads the negative input portion of the signal to thereby provide a plurality of comparison signals. A second resistive network, likewise having a plurality of resistors of equal resistance being coupled in series spreads the positive input portion of the signal to thereby provide a second plurality of comparison signals. A plurality of two-input comparators are provided to compare the comparison signals provided by the first resistive network with the comparison signals of the second resistive network.

Abstract: A hybrid package in which Kovar feedthroughs are friction welded to an aluminum housing. Friction welding produces a very strong weld joint which resists the thermal stresses induced between the aluminum housing and Kovar feedthroughs by the large difference in their coefficients of thermal expansion. Friction welding also produces a very small heat affected zone, while brazing, soldering and other types of welding produce large heat affected zones which can cause annealing problems. The aluminum package is easy to machine, light in weight and provides good heat dissipation for the hybrid microcircuits in the package.

Abstract: A new configurable gate array is defined in a master slice wafer form without borders of the kind currently known between constituent transistor gates, effectively providing a sea of gates over the wafer, interrupted if at all by islands, containing markers or the like; and a resultant application specific integrated circuit formed of such master slice is defined. In the IC, transistor gate cells, which are the same type of cells used for other purposes in the IC, are configured to serve the input and output function. Accordingly, the input and output function may be placed on any location in the IC. As an incident to personalization of the wafer saw lanes are formed of channels that extend over transistor cells and the latter cells are consequently destroyed in slicing the wafer. Means are also disclosed for an improved E-beam lithographic apparatus which permits an IC chip to be placed on an area of a wafer that is occupied by a marker, providing a wiring or macro design that avoids the marker.

Abstract: This invention discloses an engine for use in sustained space travel. The engine is of an electric type powered by a nuclear reactor. The electric engine includes a pulsed inductive magnetic thruster. A gas is discharged against an inductor comprising a series of parallel coils arranged in a spiral fashion. Each coil consists of four separate electrically connected coil sections. Each coil section traverses one-quarter of the distance around the inductor from an outer perimeter to an inner perimeter to form a single closed loop. A capacitor is electrically connected to two outer perimeter connector points for each coil forming a Marx Bank arrangement. All capacitors are charged to full charge and discharged simultaneously by a trigger generator immediately after a puff of propellant gas reaches the inductor. The high induced EMF in the inductor caused by the multiple capacitors in series in a single loop creates a rapidly rising magnetic field which ionizes the propellant gas.

Abstract: An improved time discriminator system that is incorporated on a only a single gallium arsenide chip. The system includes a sensing stage, a ramping stage, a storage stage, a logic stage, and an output stage. An input signal is input to the sensing stage, which determines the length of successive time periods in the signal, and outputs corresponding control signals. The ramping stage generates dual ramping voltages on alternate periods of the input signal, corresponding to the successive period lengths. Values of the ramping voltages are sampled and held by a storage stage. Voltages held by the storage stage are subtracted from each other and amplified in a logic stage. The output stage resamples the signal coming from the logic stage, and outputs an analog signal that is proportional to the time difference between successive periods of the input signal.

Abstract: A technique for producing detection and synchronization signals with respect to a received pseudo-random (PN) signal, with optimum signal-to-noise performance and reduced complexity and cost of hardware. Correlation of the received signal with early and late reference signals is performed in such a way that multiplication hardware is time-shared to produce an early/late sum signal for use in signal detection, and an early/late difference signal for use in synchronization, but without the degradation of performance usually resulting from time-sharing of components. In one basic form of the invention, the received signal is multiplied by one of the local reference signals, and the resulting product is demultiplexed over two alternate paths for computation of the required sum and difference signals.

Abstract: A radial power combining scheme is provided for combining a plurality of field-effect transistor-based amplifiers to form an amplifier circuit. The amplifier circuit includes input terminals for receiving high frequency power signals. A radial line power combiner/divider is provided for dividing the input signal amongst a plurality of amplifiers. The radial line power combiner/divider is further adapted to receive and combine the amplified signals which are then provided to an output. The circuit advantageously utilizes a plurality of three-port circulators for transmitting the signals within the circuit.

Abstract: There is disclosed a generic solar array panel which utilizes a printed circuit substrate. A series of electrically conductive paths for interconnecting the solar cells and other electronic components to form a solar electric power supply network is formed on or encapsulated into the substrate. An integral bus line conducts the collected power to a load. Stress relief loops routed in the substrate compensate for differences in characteristics of thermal expansion between the solar cell and the substrate while maintaining the integrity of the network's electrical connections.

Abstract: A semiconductor wafer has a plurality of holes therein which correspond to pins of an electrical connector. The wafer includes circuitry thereon and contacts for making electrical connection to the pins. In such manner, the circuitry on the wafer can be used for a wide variety of purposes such as testing or modifying signals carried by the pins. The wafer can be installed in any common electrical connector pair without prior modification or preparation of the connectors and without impairing the normal fit or function of the mated connector pair.

Abstract: A 51/2" by 53/4" flat ceramic board is bonded to an aluminum frame which serves as a heat sink. The bonding agent intermediate the board and the frame is thermally conductive and comprises an epoxy containing Master Bond EP21TDCAOHT. The formed laminate or bond is capable of withstanding repeated stresses occurring through thermal cycling in temperatures from -60 degrees centigrade to +125 degrees centigrade and vibration and humidity testing.

Abstract: This invention discloses a processing structure, and related method, for performing a selected data processing function by means of multiple processing modules that are selected to perform the selected function when appropriately connected together. The modules are removably connected to a common structure, such as a circuit board, which has associated with it a crossbar switch for providing intermodule data connections necessary for performing the selected function, and a synchronization unit for providing control signals to the modules to keep them in appropriate synchronism for performing the selected function. Convenient reconfiguration of the structure is effected by conditioning the crossbar switch and the synchronization unit as necessary to perform the different function.

Abstract: An adaptaive nulling antenna control system (24) which is effective in constraining pulse jammer duty factors. The system (24) accepts signals from a multibeam antenna (40) in a coded communication network (10). A band stop filter (50) removes the communication signal and analyzes the various antenna channels to form a nulling signal which is then combined with the original antenna signal to effectively null the jamming signal in those directional channels in which the jamming signal appears. The system (24) utilizes a successive over-relaxation type algorithm featuring scaling, eigenvalue shifting, and adaptive memory to give a fast attack time and slow release. The system (24) can be implemented in a pipeline architecture to further increase processing speed.

Abstract: A probabilistic or stochastic artificial neuron in which the inputs and synaptic weights are represented as probabilistic or stochastic functions of time, thus providing efficient implementations of the synapses. Stochastic processing removes both the time criticality and the discrete symbol nature of traditional digital processing, while retaining the basic digital processing technology. This provides large gains in relaxed timing design constraints and fault tolerance, while the simplicity of stochastic arithmetic allows for the fabrication of very high densities of neurons. The synaptic weights are individually controlled by a backward error propagation which provides the capability to train multiple layers of neurons in a neural network.

Abstract: A technique for producing high reliability GaAsAlGaAs heterojunction bipolar transistors by Molecular Beam Epitaxy with beryllium base doping. Beryllium incorporation and diffusion, during base-layer deposition, is controlled through a combination of reduced substrate temperature and increase As/Ga flux ratio during MBE growth resulting in extremely stable heterojunction bipolar transistor profiles. In addition, graded InGaAs surface layers with non-alloyed refractory metal contacts are shown to significantly improve ohmic reliability to alloyed AuGe contacts. High gain (DC beta) is achieved by the use of an increased substrate temperature during emitter deposition. The HBTs in accordance with the present invention are useful in a number of important microwave applications such as log amps, a/d converters, and sample and hold circuits where high reliability is desired.

Abstract: A technique for reducing the undesirable effects of amplifier offset voltages in quantizers such as analog-to-digital converters and related devices. The quantizer of the invention has an array of input amplifiers for comparing an input signal with multiple reference voltages, an array of latches for registering output signals from the amplifiers, and signal summing circuitry connected between the amplifiers and the latches, to produce a set of modified amplifier outputs for input to the latches, each of the modified amplifier outputs being derived from a weighted sum of at least three amplifier outputs. In the event of a defect in one or more amplifiers causing unwanted amplifier offsets, the summing circuitry improves linearity without the need for paralleling of transistor components. In one embodiment of the invention, the summing circuitry includes a resistor ladder to which the amplifier outputs are connected and from which the modified outputs are derived.

Abstract: This invention discloses an infrared detector which separates current induced by incident gamma ray radiation for use in a radiation environment. The infrared detector includes a semiconductor which includes a first layer heavily doped with n-type atoms, a second undoped layer and a third layer lightly doped with n-type atoms. At least one heavily doped n-type contact region and one heavily doped p-type contact region are embedded in the third layer. Both incident gamma ray photons and infrared photons release charge carriers in the second layer which travel as conduction current through the semiconductor. Since gamma rays are of high energy, they can release electrons from the valence band into the conduction band. When an electron is released from the valence band a hole is generated in its place which acts as current charge carrier. The electron released into the conduction band travels to the first layer and the hole travels to the p-type contact region under the influence of an electric field.

Abstract: A choke-slot ground plane and antenna system 30 is disclosed. In one embodiment the choke-slot ground plane and antenna system 30 includes a monopole antenna 44, a ground plate 36 having a plurality of concentric annular grooves 38a-c. Other embodiments include a ground plane 36 having varying size grooves to 38a-l, a ground plane having grooves having filled with dielectric material 38a'-c', a ground plate having a broadened bandwidth and having a series of first and second-type grooves 34a-c and 38a"-c", and a ground plate having a frusto-conical shape 36a and 36b.