Patents Represented by Attorney Garrett IP, LLC
  • Patent number: 8340222
    Abstract: Methods and systems to resolve the cyclic time ambiguity of a scattered pilot based channel impulse response, including to determine a channel impulse response from a combination of scattered pilots and encoded parameters, such as L1-pre signaling within P2 symbols of a terrestrial digital video broadcast (DVD) in a single frequency network (SFN), and including to re-use a corresponding window time to track the channel impulse response in the absence of encoded parameters. Methods and systems disclosed herein may be implemented with respect to channel acquisition and tracking, including adjusting a Fast Fourier Transform trigger point to reduce inter-symbol interference.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: December 25, 2012
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana, Praveen K. Shukla
  • Patent number: 8332777
    Abstract: An apparatus, system and method that allow for context and language specific data entry via a user interface. A user interface is displayed on a display device, where the user interface includes a data entry menu having one or more menu selections. A menu selection is activated. A data entry method is displayed, where the data entry method is context and language specific to the activated menu selection. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: December 11, 2012
    Assignee: Intel Corporation
    Inventors: Kevin Corbett, Brian David Johnson, Dave Koste
  • Patent number: 8325182
    Abstract: Methods and systems to sample a subset of primitives from a batch of primitives for cull/no-cull decisions, and to selectively perform a batch-cull operation on the batch of primitives in response to cull/no-cull decisions of the samples. Cull/no-cull decisions may be determined in response to one or more of a sign and magnitude of a z-component of a surface normal to corresponding primitives, using one or more primitive-independent, vertex-based cull codes, which may include a cull code based on 2-dimensional pixel space positions corresponding to the primitives. 2-dimensional pixel space positions may be pre-computed for vertices associated with a batch of primitives in advance of sampling culling.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: December 4, 2012
    Assignee: Intel Corporation
    Inventors: Uzi Sarel, Arie Narkis
  • Patent number: 8327410
    Abstract: Embodiments of a network-enabled mass storage dongle with networked media content aggregation are discussed. Embodiments provide for a dongle in a consumption mode is inserted into one or more source devices, where the one or more source devices are part of a network and store content to be aggregated for accessing on equipment. In embodiments the equipment has no intrinsic networking capabilities. The dongle allows a user to select one or more directory structures on each of the one or more source devices to be included in the aggregated content. The dongle then creates a file share for each of the selected directory structures. The dongle in an aggregation mode is inserted into the equipment and automatically connects to the network. The dongle aggregates content in the created file shares to present the aggregated content as a single mass storage device to the equipment. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: December 4, 2012
    Assignee: Intel Corporation
    Inventors: David B. Andersen, Michael Sabo
  • Patent number: 8320203
    Abstract: A method and system to lower the minimum operating voltage of a register file without increasing the area of each bit cell of the register file. In one embodiment of the invention, the register file is coupled to logic that reduces the contention between the NMOS devices and the PMOS devices in each bit cell of the register file during write and/or read operations of the register file. By doing so, the register file is able to operate at a lower minimum operating voltage.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: November 27, 2012
    Assignee: Intel Corporation
    Inventors: Seung H. Hwang, Sapumal B. Wijeratne
  • Patent number: 8316184
    Abstract: Domain-based cache management methods and systems, including domain event based priority demotion (“EPD”). In EPD, priorities of cached data blocks are demoted upon one or more domain events, such as upon encoding of one or more macroblocks of a video frame. New data blocks may be written over lowest priority cached data blocks. New data blocks may initially be assigned a highest priority. Alternatively, or additionally, one or more new data blocks may initially be assigned one of a plurality of higher priorities based on domain-based information, such as a relative position of a requested data block within a video frame, and/or a relative direction associated with a requested data block. Domain-based cache management may be implemented with one or more other cache management techniques, such as least recently used techniques. Domain-based cache management may be implemented in associative caches, including set associative caches and fully associative caches, and may be implemented with indirect indexing.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: November 20, 2012
    Assignee: Intel Corporation
    Inventors: Zhen Fang, Erik G Hallnor, Nitin B Gupte, Steven Zhang
  • Patent number: 8307175
    Abstract: Methods and systems to access data in a computer system independent of an operating environment of the computer system, including to recover data to a remote system, to overwrite data, and to copy data to a hidden partition. A management system may directly access a storage device of the computer system and communicate with the remote system over a data channel that is secure from an operating environment of the computer system. The management system may access the storage device on a block basis, using a device driver associated with a storage device controller, and may include a virtualization engine to access the storage device. The remote system may include logic to request meta-data, to identify disk blocks corresponding to files of interest from the meta-data, and to construct the files of interest from the disk blocks.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: November 6, 2012
    Assignee: Intel Corporation
    Inventors: Hormuzd M. Khosravi, Mojtaba Mojy Mirashrafi, Duncan Glendinning, Gyan Prakash
  • Patent number: 8300731
    Abstract: Methods and systems to maintain a tuner at a fixed frequency and to switch between frequencies and bandwidths in a digital domain. IQ imbalance equalization coefficients may be determined with respect to a frequency and bandwidth of a first signal, and the coefficients may be applied to baseband data associated with one or more other frequencies and/or bandwidths. Methods and systems disclosed herein may be applied in a multi-mode Multimedia over Coax Alliance (MoCA) environment, such as to digitally switch between a MoCA 2 standard and a MoCA 1.x standard.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: October 30, 2012
    Assignee: Intel Corporation
    Inventors: Nicholas Cowley, Kennan Herbert Laudel
  • Patent number: 8275057
    Abstract: Methods and systems to determine channel frequency responses corresponding to multi-carrier signals, such as OFDM signals, including to filter or mask noise from channel frequency response estimates in a time domain.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: September 25, 2012
    Assignee: Intel Corporation
    Inventors: Thushara Hewavithana, Bernard Arambepola, Parveen K. Shukla
  • Patent number: 8276004
    Abstract: Methods and systems to balance the load among a set of processing units, such as servers, in a manner that allows the servers periods of low power consumption. This allows energy efficient operation of the set of processing units. Moreover, the process is adaptable to variations in systemic response times, so that systemic response times may be improved when operational conditions so dictate.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: September 25, 2012
    Assignee: Intel Corporation
    Inventors: Ren Wang, Sanjay Rungta, Tsung-Yuan Tai, Chih-Fan Hsin, Jr-Shian Tsai
  • Patent number: 8258837
    Abstract: Methods and systems to generate multiple phases of a clock may include a delay locked loop (DLL) to generate a bias signal to control a delay time through DLL delay elements in response to a first clock, and a plurality of a quadrature slave delay lines (SDLs), each to generate a plurality of successively phase shifted clocks over a quadrant of a corresponding selected phase of a second clock. The SDLs may be biased with the DLL bias signal to control phase differences between the generated clocks. One or more phase interpolators, such as contention based phase interpolators, may be coupled to outputs of each SDL. A frequency of the second clock may be equal to or greater than a frequency of the first clock. The SDLs may be implemented with fewer delay elements than the DLL.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: September 4, 2012
    Assignee: Intel Corporation
    Inventors: Praveen Mosalikanti, Nasser Kurd
  • Patent number: 8253440
    Abstract: Methods and systems to calibrate an on-die resistor relative to an operating voltage of an on-die push-pull driver, and to calibrate the push-pull driver relative to the on-die resistor and relative to operating voltages of the push-pull driver. The calibrated on-die resistor may be used to calibrate receive terminations, a differential transmit termination, and a simulated far-end differential receive termination. The calibrated differential transmit termination and simulated far-end differential receive termination may be coupled in parallel to calibrate current drivers. Calibration of the current drivers may include calibrating voltage swing, and may include a first phase that simultaneously adjusts compensation to the current drivers, and a second phase that individually adjusts the compensation to the current drivers.
    Type: Grant
    Filed: September 23, 2009
    Date of Patent: August 28, 2012
    Assignee: Intel Corporation
    Inventors: John Maddux, Luke A. Johnson, Ronald W. Swartz, Donald Rush, Meetul Goyal, Rajashri Doddamani
  • Patent number: 8249395
    Abstract: System, method, and computer program product to adaptively blend the interpolation results from an 8-tap Lanczos filter and the interpolation results from a bilinear filter, according to the local transitions of the input content. Artifacts may occur, which may be identified as such and corrected. Pixels that represent artifacts in the blended image may be replaced with the pixel for that location taken from the bilinear interpolation.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: August 21, 2012
    Assignee: Intel Corporation
    Inventors: Ya-Ti Peng, Yi-Jen Chiu
  • Patent number: 8214677
    Abstract: A system is disclosed. The system includes a central processing unit (CPU) to operate in one or more low power sleep states, and a power converter. The power converter includes phase inductors; and one or more power switches to drive the phase inductors. The one or more power switches are deactivated during the CPU sleep state.
    Type: Grant
    Filed: July 13, 2009
    Date of Patent: July 3, 2012
    Assignee: Intel Corporation
    Inventors: Edward Burton, Robert Greiner, Anat Deval, Doug Huard
  • Patent number: 8209466
    Abstract: Methods and systems to selectively map higher-usage addresses to higher-endurance memory cells of a flash memory, and lower-usage addresses to lower-endurance memory cells of the flash memory. Address usage may be determined with respect to the most recent write operation corresponding to an address and/or with respect to a frequency of write operations corresponding to the address. Higher-endurance memory cells may include single level cells (SLCs). Lower-endurance memory cells may include multi-level cells (MLCs). Improved endurance may be obtained with a relatively small percentage of higher-endurance memory cells, at a relatively low cost.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: June 26, 2012
    Assignee: Intel Corporation
    Inventor: Jason Garratt
  • Patent number: 8209609
    Abstract: An audio-visual search and browse interface (AVSBI) is described. In an embodiment, a user interface module displays one or more media collections, where each of the one or more media collections includes multiple clips of media. The user interface module determines a center media collection from the one or more media collections that corresponds with a slider on a user interface display. The user interface module determines a left media collection and a right media collection based on the center media collection. The multiple clips of media in the center media collection are played via a center speaker, the multiple clips of media in the left media collection are played via a left speaker, and the multiple clips of media in the right media collection are played via a right speaker, all in a simultaneous, overlapping and cyclical manner. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: June 26, 2012
    Assignee: Intel Corporation
    Inventors: Randy R. Dunton, Cristobal A. Alvarez Russell
  • Patent number: 8165428
    Abstract: Methods and systems for optical imaging based computer pointing, including optical imaging based pointing motion and button functionality. Optical image motion information is translated to a computer pointing device data format, and one or more patterns, sequences, or combinations of optical image information are translated to one or more corresponding pointing device button select indications in the pointing device data format.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: April 24, 2012
    Assignee: Intel Corporation
    Inventors: Ron D Egger, Nicholas W Oakley, Wah Yiu Kwong
  • Patent number: 8141082
    Abstract: A method for detecting race conditions in a concurrent processing environment is provided. The method comprises implementing a data structure configured for storing data related to at least one task executed in a concurrent processing computing environment, each task represented by a node in the data structure; and assigning to a node in the data structure at least one of a task number, a wait number, and a wait list; wherein the task number uniquely identifies the respective task, wherein the wait number is calculated based on a segment number of the respective task's parent node, and wherein the wait list comprises at least an ancestor's wait number. The method may further comprise monitoring a plurality of memory locations to determine if a first task accesses a first memory location, wherein said first memory location was previously accessed by a second task.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: March 20, 2012
    Assignee: Intel Corporation
    Inventors: Gautam Upadhyaya, Zhiqiang Ma, Paul M. Petersen
  • Patent number: 8132003
    Abstract: Embodiments of apparatus, articles, methods, and systems for secure platform voucher service for software components within an execution environment are generally described herein. An embodiment includes the ability for a Virtual Machine Monitor, Operating System Monitor, or other underlying platform capability to restrict memory regions for access only by specifically authenticated, authorized and verified software components, even when part of an otherwise compromised operating system environment. A provisioning remote entity or gateway only needs to know a platform's public key or certificate hierarchy in order to receive verification proof for any component in the platform. The verification proof or voucher helps to assure to the remote entity that no man-in-the-middle, rootkit, spyware or other malware running in the platform or on the network will have access to the provisioned material.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: March 6, 2012
    Assignee: Intel Corporation
    Inventors: David Durham, Hormuzd M. Khosravi, Uri Blumenthal, Men Long
  • Patent number: 8121892
    Abstract: A method, system and computer program product for assessing information security interviews users regarding technical and non-technical issues. In an embodiment, users are interviewed based on areas of expertise. In an embodiment, information security assessments are performed on domains within an enterprise, the results of which are rolled-up to perform an information security assessment across the enterprise. The invention optionally includes application specific questions and vulnerabilities and/or industry specific questions and vulnerabilities. The invention optionally permits users to query a repository of expert knowledge. The invention optionally provides users with working aids. The invention optionally permits users to execute third party testing/diagnostic applications. The invention, optionally combines results of executed third party testing/diagnostic applications with user responses to interview questions, to assess information security.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: February 21, 2012
    Assignee: Safeoperations, Inc.
    Inventors: Charlie C. Baggett, Jr., John J. Adams