Abstract: A method balances workloads of storage devices of a storage subsystem. The method includes reading a mailbox to obtain control parameters and collecting historical data on numbers of accesses to storage volumes of the storage devices. The control parameters are written in the mailbox by host devices. The method also includes selecting data swaps that lead to better balanced workloads for storage devices based on the historical data. The act of selecting and/or the act of collecting being initialized by the control parameters.

Abstract: A method and an apparatus for reconfiguring a storage subsystem by performing an ordered sequence of reconfigurations of physical storage volumes of the storage subsystem. The method and apparatus perform a portion of the sequence of reconfigurations, in response to receiving a rollback request, in an order that is reversed with respect to the order of the sequence.

Abstract: A virtual memory management arrangement translates a process virtual address of an item of data in an array of data into a physical address for use in accessing a memory. A virtual address translation portion forms, in response to a process virtual address, an array virtual address including a sub-array identifier identifying a sub-array in the array and an array virtual offset identifying a virtual storage location in the sub-array. A physical address translation portion forms, in response to the array virtual address, a physical address for use in accessing a memory.

Abstract: An apparatus and method for depositing a layer of a surface-compatible material from the fluid phase onto a selected surface of a substrate body in a fluid deposition chamber features a laser source of optically focused energy directed toward the body surface in a selected pattern. The energy is focused at a position adjacent the selected surface. Apparatus is provided for introducing a fluid medium adjacent the surface of the body. The medium has at least one component which absorbs a portion of the incident laser energy at the selected frequency for effecting photodecomposition or photolysis of the component in the fluid phase. Thereby, the product(s) of the photolysis process are deposited in the selected pattern on the substrate surface. The pattern may be fixed in position or may be optically or mechanically scanned across the substrate body. Thereby, metal layers, metal interconnects, pn junction and ohmic contact forming layers, selectively doped regions, etc.

Abstract: A frequency adaptive, power-energy re-scheduler (FAPER) that includes a frequency transducer that notes frequency or frequency deviations of an electrical system and logic means which controls and re-schedules power flow to a load unit in part on the basis of the deviations in frequency from a nominal frequency and in part on the needs to the load unit as expressed by an external sensor signal obtained from the physical system affected by the load unit.

Abstract: A dynamic rate integrating demand monitor which measures electric power to a customer load at closely-spaced time intervals and prices that load at each such interval on the basis of a predetermined set of factors.

Abstract: A method and an apparatus for selectively summing the time-varying components of a plurality of electrical voltages are disclosed. The electrical voltages can each be characterized by a quiescent bias component and a time-varying small signal information component. Each electrical voltage is selectively connected to at most one of a plurality of summing buses and each bus is allowed to separately float to a quiescent voltage level corresponding approximately to a selected average value of the bias components of the signals connected thereto. The potential difference measured between the buses corresponds to the difference in the weighted average values of the time-varying components connected to each bus. The weights may be equal or unequal. The method and apparatus provide means for implementing programmable transversal filters and correlation devices.

Abstract: A process is described which combine polycrystalline isolation of collectors and shallow oxide isolation of bases. This approach is capable of providing deep dielectric isolation, surface planarity and the high density of walled emitter geometries, a combination heretofore unobtainable by any other means.This isolation scheme has been used to fabricate ECL gate chains. The transistors were located in 2.5 micron thick n epi islands surrounded by 5.times.10.sup.5 ohm-cm polysilicon selectively oxidized with silicon nitride masking to a thickness of one micron. The oxide "bump" at the nitride mask was typically 3000 A and the epi-poly step height was as small as 2600 A. The circuits have polysilicon resistors and were fabricated using both thermal diffusion and ion implantation. The power-delay product of these circuits was approximately one-half that of junction isolated circuits.

Abstract: An improved metal dual insulator semiconductor capacitor memory is disclosed. The memory contains a plurality of capacitor cells, each cell comprising a semiconductor substrate layer and a high conductivity layer sandwiching two insulator layers. The substrate is doped to provide avalanche breakdown in a surface depletion layer at a voltage comparable to the write voltage in the accumulation direction. The invention also provides a method of reading stored information without disturbing adjacent cells. A small variable voltage is applied across a "flat-band" portion of the hysteresis loop describing the voltage-capacitance relationship for the capacitor memory. A change or the absence of a change in the current through the capacitor indicates the state of the capacitor cell. Methods to fabricate the memory are also disclosed.

Abstract: A process is described which combines polycrystalline isolation of collectors and shallow oxide isolation of bases. This approach is capable of providing deep dielectric isolation, surface planarity and the high density of walled emitter geometries, a combination heretofore unobtainable by any other means.This isolation scheme has been used to fabricate ECL gate chains. The transistors were located in 2.5 micron thick n epi islands surrounded by 5.times.10.sup.5 ohm-cm polysilicon selectively oxidized with silicon nitride masking to a thickness of one micron. The oxide "bump" at the nitride mask was typically 3000 A and the epi-poly step height was as small as 2600 A. The circuits have polysilicon resistors and were fabricated using both thermal diffusion and ion implantation. The power-delay product of these circuits was approximately one-half that of junction isolated circuits.

Abstract: A cutting block or pad having a laminated construction, wherein the adjacent component layers or member elements are bonded to each other, and having at least one cuttable rod member passing therethrough is disclosed. The rods extend within the interior of the block, passing through the component layers, and each rod is preferably secured in position to provide mechanical strength to the laminated structure. The rods each have a resistance to cutting less than a predetermined die damage level and preferably comparable to the component layers of the laminated construction. The block is particularly useful in connection with a clicking die.

Abstract: A process is described which combines polycrystalline isolation of collectors and shallow oxide isolation of bases. This approach is capable of providing deep dielectric isolation, surface planarity and the high density of walled emitter geometries, a combination heretofore unobtainable by any other means.This isolation scheme has been used to fabricate ECL gate chains. The transistors were located in 2.5 micron thick n-epi islands surrounded by 5.times.10.sup.5 ohm-cm polysilicon selectively oxidized with silicon nitride masking to a thickness of one micron. The oxide "bump" at the nitride mask was typically 3000 A and the epi-poly step height was as small as 2600 A. The circuits have polysilicon resistors and were fabricated using both thermal diffusion and ion implantation. The power-delay product of these circuits was approximately one-half that of junction isolated circuits.

Abstract: An improved method for reading metal dual insulator semiconductor capacitor memories is disclosed. The memory contains a plurality of capacitor cells, each cell comprising a semiconductor substrate layer and a high conductivity layer sandwiching two insulator layers. The substrate is doped to provide avalanche breakdown in a surface depletion layer at a voltage comparable to the write voltage in the accumulation direction. According to the invention, a small variable voltage is applied across a selected cell or cells. The range of voltage includes a "flat-band" portion of the hysteresis loop describing the voltage-capacitance relationship for the capacitor memory. The unselected cells are maintained in a depletion state in which their capacitance is a minimum. A change or the absence of a change in the current through the capacitor indicates the state of the capacitor cell.

Abstract: The disclosed invention describes an apparatus and method for bringing a system having high interactive portions to a predetermined temperature distribution. The invention includes a difference controller which provides, through two separate drivers, a fixed total amount of energy to the system being controlled. If the system being controlled also has a long cycle time, second and third temperature controllers may be used to bring the system to the equilibrium temperature with a minimum amount of overshoot. The invention is particularly advantageous when used in connection with a high pressure, high temperature vessel useful in growing quartz crystals.

Abstract: Apparatus for finish casting of bifocal ophthalmic lenses from plastic material is described. No further surface grinding or polishing of the lens is required. The portion of the bifocal segment of the lens may be adjusted to any desired location relative to the optical center of the distance field of the lens. The apparatus comprises a power mold having a predetermined spherical or sphero-cylindrical surface, a bifocal mold having a predetermined optical curvature with a bifocal segment having a different optical curvature countersunk in the face thereof, and an annular gasket coupling the power and bifocal molds. The bifocal segment is adjusted relative to the optical center of the cast lens by use of a wedge member. An illustrative calculation to determine placement and thickness of the wedge for a given ophthalmic prescription is set forth.

Abstract: An electrodeposition method in which high quality metal such as copper is produced on a non-retentive cathode blank at a high current density. A predetermined close cathode-anode spacing and a gas bubble tube for continuously agitating the electrolyte across the face of the cathode enable effective use of high current densities to electrowin or electrorefine a metal such as copper.Method includes maintaining anodes apart from cathodes at a predetermined close distance, optimally less than one inch face to face. Bubble tubes are positioned between cathode-anode pairs and are supported by bubble tube support members.For electrowinning, anode is provided with a non-conductive extension on its base and non-conductive convection baffles at opposite edges of its faces. Baffles and extension prevent electrodeposition on unwanted areas of cathode. Baffles, close spacing, and bubble tubes cause desired convection of electrolyte throughout cell.