Abstract: A circuit and method for producing a phase shifted quadrature signal (VOUT) from an in-phase signal (VIN). The in-phase signal (VIN) is applied to the control electrode of a voltage follower (121). The voltage follower (121) has a variable output resistance which combines with a capacitor (123) to delay the input signal (VIN) in accordance with the time constant formed by the variable output resistance and the capacitor (123). The variable output resistance is controlled by adjusting the bias current of the voltage follower (121) with a control signal.

Abstract: A structure and a method for connecting multiple interconnect layers on an integrated circuit structure (10) using landed or non-landed vias. An integrated circuit structure (10) has an interconnect trace (11) formed over a surface. A dielectric layer (13) is formed over the integrated circuit structure (10) and a photoresist layer (14) having an opening in the area where a via is desired is formed on the dielectric layer (13). The dielectric layer (13) is isotropically etched in an upper portion (16) through the opening in the photoresist layer (14) and then anisotropically etched to expose the interconnect trace (11). The photoresist layer (14) is removed and the dielectric layer (13) subjected to a high pressure sputter etch for smoothing the surfaces of the via opening and for filling voids (18) in the dielectric layer (13).

Abstract: A circuit and method are provided for generating a programmable clock signal VRCLK at a frequency of a reference signal VREF such that the phase of VRCLK in relation to the phase of VREF is variable. VREF and VRCLK are each coupled to a frequency comparing circuit which computes their respective frequencies. The frequency comparing circuit subtracts the respective frequencies of VREF and VRCLK to produce a frequency adjusting signal VFREQ which corresponds to the difference in the frequencies of VREF and VRCLK. VFREQ is used to adjust the frequency of VRCLK.

Abstract: An amplifier (40) includes a biasing element (59) which establishes a quiescent current in two transistors (62, 72). An input voltage signal is converted to an input current signal by a voltage to current converting element (65). The input current signal differentially modulates the currents in the two transistors (62, 72). The differentially modulated currents generates differentially modulated voltages across two diodes (76, 78). Two buffers (83, 87) generates a differential output voltage signal at two output terminals (77, 79) of the amplifier (40) by shifting the differentially modulated voltages across the two diodes (76, 78). The output signal of the amplifier (40) has a low DC offset. The gain of the amplifier (40) is adjusted by adjusting the quiescent current in the two transistors (62, 72).

Abstract: A control module (11) in an airbag system (10) supplies electrical energy to and communicates with remote modules (20A-20N) through a two-wire connection. The supplied electrical energy is partially used to operate the remote modules (20A-20N) and partially stored within the remote modules (20A-20N) for deploying squibs (22A-22N). The control module (11) sends command signals to the remote modules 20A-20N) via voltage excursions between a high and an intermediate voltage levels. The remote modules (20A-20N) send signals to the control module (11) via current excursions. When an accident situation is detected, the voltage across the two-wire connection is lowered to a low voltage level, thereby interrupting a normal operation of the airbag system (10). The control module (11) then sends out firing signals via voltage excursion between the intermediate and low voltage levels. The remote modules (20A-20N) decode the firing signals and deploy the squibs (22A-22N) to inflate airbags.

Abstract: A power amplifier (50) includes two transistors (11, 21) and a dynamic biasing circuit (52). The dynamic biasing circuit (52) uses a sampling circuit (54) to generate a bias adjusting signal proportional to the amplitude of an AC signal at a drain electrode of the first transistor (11). The bias adjusting signal is combined with a constant voltage bias signal to generate a dynamic biasing signal applied to a gate electrode of the second transistor (21). As the gain of the first transistor (11) decreases, the amplitude of the AC signal at its drain electrode decreases. Thus, the dynamic biasing circuit (52) generates a lower dynamic biasing signal at the gate electrode of the second transistor (21), thereby decreasing a quiescent drain current in the second transistor (21) and improving the efficiency of the amplifier (50) at low output power levels.

Abstract: A circuit (10) for inserting a secondary video signal in a primary video signal. The primary and secondary video signals are combined forming a combined video signal having a primary video portion and a secondary video portion. The combined video signal is fed back to a feedback matching circuit (21) for measuring and comparing the phase, amplitude, and blanking level of a reference signal of the primary video portion and a reference signal of the secondary video portion of the combined video signal. The feedback matching circuit (21) makes an adjustment to the secondary video signal to reduce differences between the reference signals of the primary and secondary video portions of the combined video signal.

Abstract: A circuit for alternately providing a first frequency to a receiver stage (20) and a second frequency to a transmitter stage (25) of a transmitter and receive circuit (11). The circuit comprises an oscillator (38), a first switch (33), a second switch (42), and a control circuit (29). The first switch (33) couples information to the oscillator (38) to be transposed on the second frequency during transmission. The second switch (42) couples the oscillator (38) to either the transmitter stage (25) or the receiver stage (20). Prior to changing oscillator frequency the control circuit (29) disables both outputs of the second switch (42). The control circuit (29) alternately tunes the oscillator (38) to the first frequency and enables the second switch (42) such that the oscillator (38) is coupled to the receiver stage (20) and tunes the oscillator (38) to the second frequency, enables the first switch (33), and enables the second switch (42 ) such that the oscillator (38) is coupled to the transmitter stage (25).

Abstract: A transistor package for use in common base linear, amplification applications includes a base flange member to which an insulating substrate is disposed wherein the bottom surface of the substrate is metalized to provide electrical contact to the flange member. Opposing ends of the substrate are edge metalized to conductively contact the bottom surface while the center portion of the top surface of the substrate has a selective metalized patterned formed therein and is isolated from the metalized opposing edges A metal bonding pad is formed centrally within the center portion and isolated therefrom to which the collector electrode of a transistor chip is die bonded. A lead frame comprising first and second opposing leads and a third lead adjacent to and parallel to the first lead is brazed to the center portion such that the first and second leads are insulated from the center portion while the third lead makes direct contact thereto.