Abstract: A fastening device is provided for cooling the light source in a backlight module. The fastening device includes a frame for clipping the edge of a light source and a cooling unit disposed between the frame and the light source. The cooling unit is not only utilized for cooling, it also utilized for preventing the oscillation that affects the emitting efficiency and the operating stability of the light source.

Abstract: A method for forming a semiconductor device by self-aligned is provided. The present method provides a substrate and a multilayer structure is formed thereon. A patterned first layer is formed on the multilayer structure, and a second layer is then formed on the patterned first layer and the multilayer structure. An etching step is performed to partially etch the second layer. A third layer is formed and then is partially removed. Another etching step etches the patterned first layer. The multilayer structure is etched to expose the substrate. The third layer is also etched. A gate layer is formed on the semiconductor device, wherein a plurality of implanted regions are formed inside the substrate not covered by the multilayer structure.

Abstract: An adjustable air conditioning and regulation apparatus for human respiratory system includes an air treatment assembly and a host controlling assembly. The air treatment assembly has an air filter, a humidity control, a heating device for temperature control and a pressure control. The air filter removes the particles and smells from the air. The clean air is regulated by the controls that maintain the clean air at a desired level of temperature, pressure and humidity. The apparatus provides clean, fresh and comfortable air for the patients with compromised respiratory system.

Abstract: A method for fabricating a flash memory cell is provided. After an ONO dielectric layer is formed on a first conductive layer over a tunnel oxide layer, a second conductive layer is formed on the ONO dielectric layer. Then, patterning the second conductive layer to form a periphery region comprising an exposed portion of a semiconductor substrate and a memory cell region comprising the left second conductive layer. During the present process, the ONO dielectric layer is protected from being exposed in various solvents and gases with the second conductive layer. Thus, a flash memory cell with a high-quality ONO gate dielectric layer, without increasing complexity of the process and additional masks, is obtained.