Abstract: An improved autopilot system of the type which uses pitch commands to control airspeed with an improvement of including a temporary pitch hold command being issued if thrust changes would oppose the autopilot pitch command. The temporary pitch hold command would end when the airspeed reaches a calculated airspeed capture point.

Abstract: There is disclosed a technique for providing resynchronization for message reception in digital transmission systems, and particularly in digital frequency hopping systems employing data framing techniques. In the transmission of framed data using known digital techniques for frequency hopping systems, synchronization is provided in frames preceding the message frames transmitting digital data. In addition, resynchronization information is transmitted in subsequent frames which are interspersed with data frames including the message data. A predetermined number of frames is set to provide all the resynchronization information so that once those frames have been detected, a receiver will have acquired resynchronization during message transmission. This technique allows improved signal acquisition by providing an opportunity following the first conventional synchronization frame to acquire synchronization or to reacquire synchronization during message transmission.

Abstract: A high speed programmable prescaler has an input divider that divides an input stream of clock pulses by either 2 or upon command by 3. Connected to the input divider is a plurality of dividers that are electrically cascaded together from a first member to last member with each member of the plurality of dividers being capable of dividing the clock pulses applied to it by either 2 or upon command by 3. A prescaler selects either 2 or 3 for dividing the input stream of clock pulses so that number of clock pulses necessary to obtain an output pulse can be represented by the equation of 2.sup.N +M where N is the number of members of the plurality of dividers and M is the control number having a range of 0 to 2.sup.N -1.The critical path delays are minimized by using a flip-flop in the input divider to divide by 2 and then on command shifting the output of the flip-flop by 180.degree. to obtain the divide by 3 function.