Patents Represented by Attorney George E. Roush
  • Patent number: 4591929
    Abstract: Learning additional languages and similar subject matter wherein repetition and comparison of spoken phrases is of value is enhanced by this electronic circuitry auxiliary to the conventional magnetic tape recorder. The circuitry according to the invention comprises an addressable electronic store, control circuitry, therefor arranged for storing a plurality of messages or texts in separate locations, and converting circuitry for converting analog signals emanating from the recorder or from a microphone used by the learner into digital signals for storage and for converting the digital signals into analog signals for reviewing aurally. Four modes of operation are available. Full electronic control and interlock are provided with easy manipulation of four switches and one gain control element.
    Type: Grant
    Filed: July 13, 1984
    Date of Patent: May 27, 1986
    Inventor: Harley M. Newsom
  • Patent number: 4348632
    Abstract: The control of the operation of an electric circuit element, such as an electrochemical cell, is performed by positive feedback servocircuitry developing an error signal or inherent noise component, and having algebraic computing capability for developing the compensating control. Current follower circuitry is arranged for developing a potential proportional to the current drawn by the electric circuit element to be controlled. A portion of this potential is algebraically combined with the externally applied operating electric wave. The inherent noise component of the control circuitry is sensed by a high pass filter and an ac-dc converting circuit and thereafter integrated for generating a slowly varying potential for determining the portion of the potential derived by sensing the current. The two potentials are applied to a conventional multiplying circuit and the product potential combined with the operating wave.
    Type: Grant
    Filed: September 15, 1980
    Date of Patent: September 7, 1982
    Assignee: International Business Machines Corporation
    Inventors: Ronald K. Galwey, Kay K. Kanazawa
  • Patent number: 4347585
    Abstract: This matrix has high barrier Schottky diodes at Read or Reproduce Only Storage (ROS) matrix crossovers to represent 1's (the absence of diodes representing 0's) and low barrier Schottky diodes connected to select individual column lines (bit lines) of the ROS matrix. A current sink is connected to each column. Any unselected column causes the current in that column to be diverted through the respective low barrier diode, thus preventing that current from flowing into the selected word line. The only current that flows into the selected word line of a matrix depends from the single selected column current source.
    Type: Grant
    Filed: June 9, 1980
    Date of Patent: August 31, 1982
    Assignee: International Business Machines Corporation
    Inventor: David B. Eardley
  • Patent number: 4346312
    Abstract: This bistatic signal current driver circuit applies positively controlled drive at both signal current levels to an output open collector driver transistor by way of two substantially identical signal translating networks which track each other and compensate for variations in global base-to-emitter voltage drops, beta factors, and supply voltages. An inverted output is available merely by switching connections internally of the two networks to reverse the phase of the driving currents.
    Type: Grant
    Filed: November 19, 1979
    Date of Patent: August 24, 1982
    Assignee: International Business Machines Corporation
    Inventor: Warren A. Christopherson
  • Patent number: 4342227
    Abstract: This device comprises a v-shaped cavity in a planar semiconductor substrate having a substantially thin-walled v-shaped cantilever beam inset therein. The beam is movable in directions normal to and laterally of the plane of the substrate, whereby acceleration is sensed in both of these directions. A planar substrate of n-type silicon is arranged with the major face oriented in the (100) plane. A v-shaped groove is anisotropically etched in the substrate and capacitor electrode regions are diffused into the sloping walls. An epitaxial layer is grown over this substrate, and over that a layer of insulation is added. A layer of conductive material is laid down on the insulation to define an electrode. The substrate is again subjected to an anisotropic etchant for cutting the epitaxial layer from under the cantilever beam formed of the insulating layer and the conducting layer.
    Type: Grant
    Filed: December 24, 1980
    Date of Patent: August 3, 1982
    Assignee: International Business Machines Corporation
    Inventors: Kurt E. Petersen, Anne C. Shartel
  • Patent number: 4334310
    Abstract: The generation of internal circuit noise due to the switching of differing numbers of bilevel data lines is suppressed by maintaining the energizing current substantially constant with widely varying amounts of current drawn by varying the current drawn by redundant driver circuits, which also generate parity or check signals, to compensate for the difference in current drawn by the designated data driver circuits. The number of redundant driver circuits is reduced by loading the second and further redundant driver circuits for drawing currewnts related to the current drawn by the first redundant driver circuit by succeeding powers of two. Further suppression in internal circuit noise obtains with gating of all driver circuits at the time switching occurs. Control circuitry comprising conventional full adder circuits arranged for expressing the number of data signal lines in a given level is advantageous for controlling the redundant driver circuits and for generating check bits at the same time.
    Type: Grant
    Filed: June 23, 1980
    Date of Patent: June 8, 1982
    Assignee: International Business Machines Corporation
    Inventor: Gerald A. Maley
  • Patent number: 4332000
    Abstract: An integrated semiconductor pressure transducer comprises a central conducting diaphragm located between two frusto-pyramidal recesses defined by contiguous semiconductor body members of conductivity type different from that of the diaphragm. A metal membrane with communicating apertures subtends one cavity and forms a relatively fixed plate of a capacitor, the other plate of which is formed by the diaphragm. A method of making the transducer in semiconductor process steps includes provisions for normal integrated circuit device fabrication whereby a transducer and utilization circuitry are fabricated in the same process into a single integrated semiconductor device.
    Type: Grant
    Filed: October 3, 1980
    Date of Patent: May 25, 1982
    Assignee: International Business Machines Corporation
    Inventor: Kurt E. Petersen
  • Patent number: 4331886
    Abstract: This current switch driving circuit arrangement particularly for, but not necessarily limited to, inductive device current switching, comprises a pair of output transistors constituting a driving transistor for turning ON a subsequent switching transistor and a current sinking transistor for turning OFF that switching transistor. A receiver circuit is arranged for applying one bilevel logical signal for alternatively driving the two transistors by way of intermediate circuits each having current multiplying circuitry for deriving the necessary driving currents. The intermediate circuitry is effective for toggling the current from one of the transistors to the other with provisions for insuring speedy switching action.
    Type: Grant
    Filed: June 23, 1980
    Date of Patent: May 25, 1982
    Assignee: International Business Machines Corporation
    Inventors: Fred A. Perner, Lionel D. Provazek
  • Patent number: 4331887
    Abstract: This current switch driving circuitry, particularly for, but not necessarily limited to, inductive device current switching, comprises a pair of output transistors constituting a driving transistor for turning ON a subsequent switching transistor and a current sinking transistor for turning OFF that switching transistor with circuit provisions for maintaining the two transistors in a low power consuming standby state. A pair of receiver circuits are arranged for applying ON and OFF logical signals individually to the two transistors by way of intermediate circuitry having current multiplying circuitry for deriving the necessary driving power with a minimum of power consumed.
    Type: Grant
    Filed: June 23, 1980
    Date of Patent: May 25, 1982
    Assignee: International Business Machines Corporation
    Inventors: Dale K. Jadus, Richard O. Seeger
  • Patent number: 4328525
    Abstract: A sine wave oscillating circuit arrangement useful in generating an electromagnetic field, for example, comprises a resonant circuit including an inductor through which the current is tightly controlled and a capacitor connected in parallel, to which dc pulses are applied at a repetition rate equal to the resonant frequency. The current flowing in the inductor is sensed in phase detector and amplitude detectors. The results of these evaluations are applied to cascaded pulse position and pulse width and/or amplitude modulators. A current switching driver circuit driven by pulses from the modulator is connected to the resonant circuits for modifying the dc pulses applied for maintaining the sine wave current in the inductor at the proper amplitude and phase relationship and energy content inversely as the potential across the sampling resistor in the resonant circuit. The energy dissipated in damping the resonant circuit in one cycle of operation is replaced in the next cycle.
    Type: Grant
    Filed: June 27, 1980
    Date of Patent: May 4, 1982
    Assignee: International Business Machines Corporation
    Inventors: Jay W. Allen, Peter J. Granata
  • Patent number: 4322769
    Abstract: This switch monitoring circuitry is particularly applicable to switching circuitry for operating a bipolar load device, frequently an inductor, on a source of direct current with four switches arranged to alternate the polarity of potential across the load device in a predetermined periodicity. Such circuitry often is arranged with diode devices individually connected across the switches, especially where the load device is an inductor. The monitoring circuitry specifically described comprises basic logical circuitry having coincidence gating circuits for activating status indicating circuitry; or for controlling associated circuitry for protecting or for compensating the switching circuitry; or for alarming operating personnel of malfunctioning switches.
    Type: Grant
    Filed: December 22, 1980
    Date of Patent: March 30, 1982
    Assignee: International Business Machines Corporation
    Inventor: Evert S. Cooper
  • Patent number: 4304467
    Abstract: The focal range of a focussed laser beam is enlarged with a simple optical stop where the beam has a Gaussian cross-sectional profile. The stop is arranged between the laser producing the beam, and a beam focussing lens system, and it is provided with an aperture of predetermined diameter with respect to that of the laser beam whereby the outer portion of the beam represented by the low intensity skirts of the profile curve is stopped. This arrangement can influence the focal range up to a 75 percent increase over that obtained with the unstopped beam.
    Type: Grant
    Filed: May 29, 1979
    Date of Patent: December 8, 1981
    Assignee: International Business Machines Corporation
    Inventor: Melbourne E. Rabedeau
  • Patent number: 4295145
    Abstract: In those high speed laser scanning systems, particularly those used in printing, employing an acousto-optical modulator driven at two or more carrier frequencies for scanning with a plurality of focussed beams simultaneously in order to reduce the required deflection scan rate and to better the rise and fall times of the waveforms, unwanted intermodulation effects arise. These undesirable intermodulation effects can be reduced or largely eliminated by increasing the difference in the carrier frequencies such that the diffracted beam spacing is increased considerably and utilizing either a scan line interlace scheme or a staggered beam scheme to maintain the required scan line spacing. In the latter case, the modulator is situated with the direction of propogation of the acousto-waves between zero and 90 degrees to the direction of image pattern scanning. The angle is made sufficiently large as to make one light beam spot in one scanning line lag a corresponding spot in the adjacent line.
    Type: Grant
    Filed: December 29, 1978
    Date of Patent: October 13, 1981
    Assignee: International Business Machines Corporation
    Inventor: Milton R. Latta
  • Patent number: 4290672
    Abstract: Unwanted interference effects arising in those high speed laser scanning systems, particularly those used in printing, employing an acousto-optical modulator for scanning with a plurality of focussed beams simultaneously in order to reduce the required deflection scan rate, and to better the rise and fall times of the waveforms, are largely eliminated by arranging a pair of Bragg deflection cells one behind the other with the directions of propagation of the acoustic waves in the cells substantially 90 degrees apart with respect to each other. The undeflected beam of light is projected onto the cells at the Bragg angles for both cells. Substantially, the same results obtain as though a single Bragg cell were used but devoid of acoustical interference effects.
    Type: Grant
    Filed: June 29, 1979
    Date of Patent: September 22, 1981
    Assignee: International Business Machines Corporation
    Inventor: Rodney J. Whitefield
  • Patent number: 4270092
    Abstract: This current controlling circuitry is arranged to monitor and control the operation of transistor circuitry for the development of a highly accurate and stable reference electric level potential and/or current for distribution to a plurality of logical circuits on a semiconductor chip having of the order of a thousand such circuits thereon. A first order reference potential is developed by a current-source reference circuit and applied to a transistor operational amplifying circuit having current control circuitry connected in the biasing subcircuitry of that transistor amplifying circuit. This control circuitry essentially monitors the output of an amplifying circuit and adjusts feedback potential to an emitter bias supplying current source transistor for that amplifying circuit.
    Type: Grant
    Filed: May 18, 1979
    Date of Patent: May 26, 1981
    Assignee: International Business Machines Corporation
    Inventor: Warren A. Christopherson
  • Patent number: 4232363
    Abstract: This closed loop potential regulated ac-dc power supply comprises a power transformer having two secondary windings and a compensating transformer having two compensating windings connected individually in series circuit with the principal power supply secondary windings. The other secondary windings on the power transformer supply exciting windings for compensating variations in output potential by control of the compensating transformer control circuitry which has an input circuit connected across the load and an output for varying the ac supply to the exciting windings inversely of variations in load potential. A differential amplifying circuit is used for determining the load potential error and driving a transistor effectively to insert a dc component in inverse feedback relationship into the exciting windings of the compensating transformer. As the output potential error increases, the control current is decreased, and conversely.
    Type: Grant
    Filed: December 4, 1978
    Date of Patent: November 4, 1980
    Assignee: International Business Machines Corporation
    Inventors: Hobart A. Higuchi, Sammy K. Yee
  • Patent number: 4232253
    Abstract: Distortion due to interaction or cross coupling, frequently termed "cross talk", in magnetic deflection yokes for display tubes is initially corrected by simple networks comprising capacitors and by networks comprising resistor-capacitor combinations connected in the yoke winding circuitry for canceling poles and zeros of the frequency response pattern, and residual distortion is then canceled by rearranging the turns of the winding with respect to the core of an otherwise conventional magnetic deflection yoke to provide a more uniform magnetic field and to avoid resonance in the yoke circuit. The winding is further rearranged in some applications wherein the number of total turns is not integrally divisible by distributing the conductors in an uneven winding arrangement in the same manner but having a difference of a single turn only from the adjacent courses of the winding.
    Type: Grant
    Filed: December 23, 1977
    Date of Patent: November 4, 1980
    Assignee: International Business Machines Corporation
    Inventor: Joost Mortelmans
  • Patent number: 4201941
    Abstract: This spinning apparatus for nuclear magnetic resonance (NMR) spectrometers is readily mountable and demountable in the spectrometer and is arranged for ease in loading samples to be spun. The apparatus is also arranged for ease in aligning the sample in the magnetic field for obtaining optimum results. At the same time, the apparatus is simple, and inexpensive in construction. Basically, the spinning apparatus comprises a stator assembly in the form of a nonmagnetic cylindrical body member having a conical bore arranged at an angle to the longitudinal axis of the body member lying between 45.degree. and 90.degree. and located in approximately one-half of the body member. A rotor assembly comprising a conical head portion and a cylindrical tail portion fits into the conical bore for spinning the sample which is loaded into the cylindrical portion.
    Type: Grant
    Filed: August 4, 1978
    Date of Patent: May 6, 1980
    Assignee: International Business Machines Corporation
    Inventors: Colin A. Fyfe, Horst G. Mossbrugger, Costantino S. Yannoni
  • Patent number: 4194135
    Abstract: This circuitry translates a relatively large voltage bi-level logical signal to an inphase relatively low voltage bi-level signal for bistatic current-switching logical circuitry. A transistor is connected in the common base circuit arrangement for a first order of input-output circuit isolation. Substantially complete isolation is afforded by a reference tracking circuit which is arranged to track exactly for temperature, base-to-emitter voltage and process variations. This circuit provides a potential at the base of the transistor which is the sum of the emitter-to-base voltage drop and one half of the applied energizing potential. The proper base potential is effected by simple adjustment of the ratio of the value of the input resistor to the value of the load resistor. Many such circuits may be operated on a single semiconductor chip.
    Type: Grant
    Filed: June 30, 1978
    Date of Patent: March 18, 1980
    Assignee: International Business Machines Corporation
    Inventor: Warren A. Christopherson
  • Patent number: 4189133
    Abstract: A document stacking table is lowered in steps under electronic control as the documents accumulate. A predetermined number of documents are stacked, after which the table is lowered by a predetermined amount. An optical sensing arrangement is used to determine the effective top of the stack of documents within the limits of "light sensed" and the "absence of light". If light is sensed, the count is increased and the table lowered again; in the absence of light the count is decreased and the table is again lowered. Thus the stacking table will be lowered by a fixed amount to the level of least error.
    Type: Grant
    Filed: November 3, 1978
    Date of Patent: February 19, 1980
    Assignee: International Business Machines Corporation
    Inventors: Fred V. Arrasmith, Donald G. Bruns, David G. Killam