Abstract: A high resolution matrix addressed flat panel display having single field emission microtip redundancy is formed. A dielectric base substrate is provided. Parallel, spaced conductors acting as cathode columns for the display are formed upon the substrate. A layer of insulation is located over the cathode columns. Parallel, spaced conductors acting as gate lines for the display is formed over the layer of insulation at a right angle to the cathode columns. The intersections of the cathode columns and gate lines are the pixels of the display. A plurality of openings at the pixels extend through the insulating layer and gate lines. At each of the pixels are a plurality of field emission microtips connected to and extending up from the cathode conductor columns and into the plurality of openings. There is a circular resistive layer surrounding each of the field emission microtips to obtain emission uniformity by sustaining the cathode to gate voltage.