Abstract: A process for growing an ultra-thin dielelctric layer for use as a MOSFET gate or a tunnel oxide for EEPROM's is described. A silicon oxynitride layer, with peaks in nitrogen concentration at the wafer-oxynitride interface and at the oxynitride surface and with low nitrogen concentration in the oxynitride bulk, is formed by a series of anneals in nitric oxide and nitrous oxide gas. This process provides precise thickness control, improved interface structure, low density electron traps, and impedes dopant impurity diffusion from/to the dielelctric and substrate. The process is easily integrated into existing manufacturing processes, and adds little increased costs.
Type:
Grant
Filed:
September 8, 1998
Date of Patent:
June 12, 2001
Assignee:
Advanced Micro Devices, Inc.
Inventors:
Ming-Yin Hao, Robert Bertram Ogle, Jr., Derick Wristers