Abstract: A solid state circuit, which serves as a twin simplex/half-duplex converter, includes a triple input NAND gate. The output of the NAND gate is connected directly to the outgoing simplex conductor. Signals on the incoming simplex conductor are applied to the three inputs of the NAND gate through separate signal paths which introduce different delays. One signal path introduces an intermediate delay before applying the incoming signal to the NAND gate in an inverted form. The half-duplex line is connected to this signal path. While incoming signals are applied to all three inputs to the NAND gate as well as to the half-duplex line, a lack of coincidence at the inputs prevents any incoming signal from passing through the converter to the outgoing simplex line.

Abstract: A printed circuit board holder includes an integral, generally rectangular board receptacle which is pivotally supported above the base of a data processing device by spaced cradle posts. The receptacle can be pivoted from a normal position through an angle of approximately 90.degree. to a service position in which the receptacle bottom wall is nearly perpendicular to the base. An integral latch mechanism keeps the holder in the normal position until the latch is manually released. Multiple pin connector boards and stiffener plates are secured to the receptacle by integral latches.

Abstract: Where a solid state optical transducer is mounted on a ceramic substrate, an improved optical signal path is provided by adding a preformed hole to the substrate in alignment with the active region of the transducer. A metal pin having a light transmitting core is inserted into the preformed hole using the same pin insertion techniques used to secure other solid pins to the substrate. The core provides an optical signal path while the cylindrical metal pin can be used both as a heat sink and to provide an additional electrical path to the transducer.

Abstract: A light switch for controlling the transmission of optical energy through optical fibers includes a hollow, light-transmitting tube extending transversely across the end of at least one light transmitting fiber. The tube contains one or more masses of light diverting material in a matrix of light-transparent fluid. The masses of light diverting material may be reflective, refractive or absorbent. Means are provided for varying the pressure along the tube to shift the masses relative to the light transmitting fiber so as to divert or pass the light to receiving fibers.

Abstract: A method and device for measuring the slope of the envelope delay characteristic in a transmission channel. The slope is determined from a received measurement signal having a frequency spectrum that includes three rays at frequencies f.sub.o, f.sub.1 and f.sub.2, which are approximately located in the center and at the edges of the useful passband of the channel. At the output of the channel, the three components at frequencies f.sub.o, f.sub.1 and f.sub.2 are extracted from the received measurement signal, and the instantaneous phases .psi.0, .psi.1 and .psi.2 of these three components are measured. The value of the slope S of the envelope delay characteristic is obtained from the relation ##EQU1## where .phi..sub.o ', .phi..sub.1 ' and .phi..sub.2 ' are the phases of the three rays at frequencies f.sub.o, f.sub.1 and f.sub.2 of the measurement signal sent over the channel.

Abstract: A power line disturbance (PLD) detector circuit includes a digital counter which is driven by pulses provided by a clock in an associated data processing system. The PLD detector circuit includes a comparator amplifier for comparing primary AC power to a DC reference voltage on a cycle-by-cycle basis. The amplifier generates a reset pulse once during each AC cycle as long as the AC voltage exceeds the DC reference voltage. When a decoder circuit detects a count outside the range of counts attained by the digital counter between normally occurring reset pulses, the decoder circuit responds by generating a PLD signal. The PLD signal is provided both to the associated data processing system and to a Power On Reset circuit. The Power On Reset circuit is initialized by the PLD signal, permitting the circuit to respond consistently upon subsequent restoration of power.

Abstract: A method and device for measuring the slope of the envelope delay characteristic of a transmission channel and deriving the phase intercept value therefrom. A measurment signal having a frequency spectrum including three rays at frequencies f.sub.o, f.sub.1 and f.sub.2 is sent over the transmission channel. Frequency f.sub.o is the carrier frequency and frequencies f.sub.1 and f.sub.2 are defined as f.sub.1 =f.sub.o -1/2T and f.sub.2 =f.sub.o +1/2T, where 1/T is the signaling rate. At the output of the channel, the three components at frequencies f.sub.o, f.sub.1 and f.sub.2 are extracted from the received measurement signal, and the instantaneous phases .psi..sub.o, .psi..sub.1 and .psi..sub.2 of these three components are then measured. The value of the slope S of the envelope delay characteristic is obtained in accordance with the relation ##EQU1## where .phi..sub.o.sup.', .phi..sub.1' and .phi..sub.2' are the phases of the three rays at frequencies f.sub.o, f.sub.1 and f.sub.

Abstract: An integral hinge structure for securing a cover to a terminal base includes a generally cylindrical strip of material extending along one edge of an opening to be covered. The cylindrical strip is integral with the base but is spaced from the base by a thin, continuous neck. The cover includes a generally C-shaped strip of material circumscribing an arc of at least 180.degree.. The outer diameter of the cylindrical strip and the inner diameter of the C-shaped strip are approximately the same, allowing the C-shaped strip to be snapped onto and retained by the cylindrical strip. The cover is aligned by one or more radial ribs on the cylindrical strip and one or more complementary slots in the C-shaped strip.

Abstract: A multiple frequency RF modem includes a frequency synthesizer for providing local oscillator signals to double balanced mixer circuits in both the transmitter and receiver sections. To test the frequency synthesizer, the synthesizer is set to produce a local oscillator signal having a nominal frequency of 3 IF. The transmitter RF filter is tuned to suppress all harmonics and sidebands other than the 4 IF sideband. A ganged set of switches is employed to connect the transmitter output directly to the receiver input in the modem. Another switch in the set isolates the receiver mixer circuit from the frequency synthesizer during testing and connects it instead directly to the output of an IF oscillator in the transmitter section. Due to its non-linear operating characteristics, the receiver mixer circuit generates a strong third harmonic of its local oscillator input. During operation in the testing mode, this third harmonic has a frequency of 3 IF.

Abstract: A polling system includes a central processor and a plurality of subsystems connected in a loop to the central processor. A receive/bypass circuit in each subsystem includes a depletion mode field effect transistor having its drain and source electrodes connected in series in a bypass line at the subsystem. A control circuit is connected to a polling signal input line at each subsystem. When the subsystem has power, the control circuit routes the polling signal to a terminal device in the subsystem while establishing a conduction-inhibiting voltage at the gate electrode of the field effect transistor. When the subsystem is unpowered or out of service, a switching transistor in the control circuit isolates the terminal device from the polling signal input line. The polling signal bypasses an unpowered subsystem through the unbiased field effect transistor in the bypass line.

Abstract: A dual threshold comparator circuit includes a comparator amplifier for comparing an analog input signal to a threshold waveform. The threshold waveform is generated in a circuit which includes positive and negative peak detector circuits and a slope detector circuit, all of which are connected to the analog signal source. A voltage divider is connected across the output of the positive and negative peak detector circuits. The threshold input to the comparator amplifier is connected to the common junction of first and second serially-connected impedances in the voltage divider. At the beginning of a particular half cycle of the analog input signal, the voltage across the voltage divider is equal to the difference of the most recent positive and negative peak voltages. The slope detector alters the effective impedances in the voltage divider to cause the threshold voltage to be equal to 25 or 75% of the total difference voltage, depending upon the slope of the analog signal.

Abstract: A data entry terminal has a base unit and keyboard unit which can be assembled to provide an integrated configuration or separated to provide a distributed configuration. No tools are required. The base unit has a recess with vertical guides and a protruding electrical connector providing an input path to the device electronics. The keyboard unit has complementary guides and a connector which mates with the base unit connector when the keyboard unit is slipped into place along the guides. The terminal is readily converted from an integrated configuration to a distributed configuration by removing the keyboard unit from the base unit, adding an auxiliary cable to carry signals between the keyboard unit connector and the base unit connector and concealing the base unit recess with a filler panel having the same guide structure as the keyboard unit.

Abstract: A connector assembly for an optical cable, consisting of an optical fiber and a protective jacket, includes a connector body with an opening therethrough. The opening consists of two coaxial bores of different sizes. A sleeve assembly located within the larger bore includes an outer heat-shrinkable sleeve and a concentric, inner sleeve of meltable filler material. A length of optical fiber from which the protective jacket has been stripped is inserted through the sleeve assembly and through the second, smaller bore in the connector body. Heat is applied to the connector assembly. The shrinking outer sleeve forces melting filler material into the smaller bore to lock the fiber in place. The connector body is also secured to the protective jacket of the optical cable to relieve strain on the optical fiber.