Patents Represented by Attorney Graybeal Jackson LLP
  • Patent number: 8350551
    Abstract: An embodiment of a power-supply controller includes a signal combiner and a control circuit. The signal combiner is operable to generate a combined feedback signal from sense and output feedback signals that are respectively derived from a sense signal and a regulated output signal, and the signal combiner is operable to receive the sense signal from a sense circuit that is operable to generate the sense signal while a current is flowing through an inductor and while a switch that is disposed between the inductor and an input voltage has a first state. The sense signal generated by the sense circuit is related to the current, and the switch and the inductor are operable to generate the regulated output signal. The control circuit is coupled to the signal combiner and is operable to cause the switch to have a second state for a predetermined time in response to the combined feedback signal having a predetermined relationship to a reference signal.
    Type: Grant
    Filed: June 29, 2010
    Date of Patent: January 8, 2013
    Assignee: Intersil Americas LLC
    Inventors: Da Feng Weng, Jinrong Qian, Tamas Szepesi
  • Patent number: 8344449
    Abstract: An embodiment of a process for manufacturing an electronic device on a semiconductor body of a material with wide forbidden bandgap having a first conductivity type.
    Type: Grant
    Filed: December 17, 2009
    Date of Patent: January 1, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Mario Giuseppe Saggio, Edoardo Zanetti, Ferruccio Frisina
  • Patent number: 8338888
    Abstract: An integrated device includes a semiconductor body, in which an STI insulation structure is formed, which delimits laterally first active areas and at least one second active area, respectively, in a low-voltage region and in a power region of the semiconductor body. The integrated device moreover includes low-voltage CMOS components, accommodated in the first active areas, and a power component in the second active area. The power component has a source region, a body region, a drain-contact region, and at least one field-insulating region, set between the body region and the drain-contact region. The field-insulating region is provided entirely on the semiconductor body.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: December 25, 2012
    Assignee: STMicroelectronicis S.r.l.
    Inventor: Paolo Colpani
  • Patent number: 8334576
    Abstract: MOS device formed in a semiconductor body having a first conductivity type and a surface and housing a first current-conduction region and a second current-conduction region, of a second conductivity type. The first and second current-conduction regions define between them a channel, arranged below a gate region, formed on top of the surface and electrically insulated from the channel region. A conductive region extends on top of a portion of the channel, adjacent to and insulated from the gate region only on a side thereof facing the first current-conduction region. The conductive region is biased so as to modulate the current flowing in the channel.
    Type: Grant
    Filed: June 13, 2007
    Date of Patent: December 18, 2012
    Assignee: STMicroelectronics S.r.l.
    Inventors: Salvatore Cascino, Maria Concetta Nicotra, Antonello Santangelo
  • Patent number: 8334188
    Abstract: A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: December 18, 2012
    Assignee: STMicroelectronics S.r.l.
    Inventors: Flavio Villa, Gabriele Barlocchi, Pietro Corona
  • Patent number: 8327692
    Abstract: Disclosed is a device for measuring the concentration of the particles contained in a fluid. The device comprises a control volume body having a predetermined effective volume. An inlet path is formed at an end of the control volume body to feed the fluid into the control volume body therethrough. An outlet path is formed at another end of the control volume body to discharge the fluid from the control volume body therethrough. Measuring instruments are provided at the inlet path and the outlet path to emit electrical signals when the fine particles pass through the inlet path and the outlet path. A computing machine receives the electrical signals transmitted from the measuring instruments, and then computes the number and the concentration of fine particles contained in the control volume body. The device is easily integrated with Micro-TAS (Total analysis System).
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: December 11, 2012
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Young-Ho Cho, Dong Woo Lee, Soyeon Yi
  • Patent number: 8330482
    Abstract: An embodiment test system is proposed; the test system is used to test electronic devices each one having a case with a plurality of terminals for example, of the BGA type. The test system includes a set of (one or more) test boards. Each test board includes a plurality of banks of electrically conductive receptacles, each one for resting a corresponding electronic device; each receptacle is adapted to receive a terminal of the corresponding electronic device. A set of (one or more) boxes is arranged in operation above the test boards. Each box defines an expandable chamber for a conditioning fluid; particularly, the box includes a rigid body, a flexible membrane of a thermally conductive material facing the test boards, an inlet, and an outlet. Means is provided for controlling a temperature of the conditioning fluid (for example, a heat exchanger).
    Type: Grant
    Filed: February 14, 2008
    Date of Patent: December 11, 2012
    Assignee: Eles Semiconductor Equipment S.p.A.
    Inventor: Fabrizio Scocchetti
  • Patent number: 8325853
    Abstract: Embodiments of the present invention relate to a system for clock synthesis or data timing recovery. No analog continuous time oscillator is required, all the building blocks of a Frequency Locked Loop/Phase Locked Loop belonging in the digital discrete time domain. From a system-level perspective, the system is characterized by its strong non-linear behavior due to the intrinsic nature of some building blocks. This inherent non-linearity is responsible for some unusual, attractive property of the complete system. The system is able to multiply the input frequency clock by an arbitrarily large factor, ensuring in any case the convergence of the algorithm in two reference clock cycles.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: December 4, 2012
    Assignee: STMicroelectronics S.r.l.
    Inventor: Carmelo Burgio
  • Patent number: 8325717
    Abstract: In a network, packets are fragmented into head and non-head fragments. Non-head fragments are saved up front at an entry point, while a network switch forwards only the head fragment to Layer 4-Layer 7 (L4-L7) features for processing. The switch records changes that are performed on the head fragment's fields by the L4-L7 features while they process the head fragment. At an exit point, fields of the saved non-head fragments are overwritten with information that was recorded for the head fragment. This can include updating or modifying the source and destination parameters of the non-head fragments in an intelligent manner by reusing the results of the packet processing that was performed on the head fragment. This fragmentation handling technique avoids having to redundantly process the non-head fragments in the same manner as the head fragments.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: December 4, 2012
    Assignee: Foundry Networks, LLC
    Inventor: Saurabh Kumar
  • Patent number: 8324669
    Abstract: A process for manufacturing a MOS device includes forming a semiconductor layer having a first type of conductivity; forming an insulated gate structure having an electrode region, above the semiconductor layer; forming body regions having a second type of conductivity, within the semiconductor layer, laterally and partially underneath the insulated gate structure; forming source regions having the first type of conductivity, within the body regions; and forming a first enrichment region, in a surface portion of the semiconductor layer underneath the insulated gate structure. The first enrichment region has the first type of conductivity and is set at a distance from the body regions. In order to form the first enrichment region, a first enrichment window is defined within the insulated gate structure, and first dopant species of the first type of conductivity are introduced through the first enrichment window and in a way self-aligned thereto.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: December 4, 2012
    Assignee: STMicroelectronics S.r.l.
    Inventor: Giuseppe Curro
  • Patent number: 8326505
    Abstract: A control system for an electromechanical-braking system provided with actuator elements configured to actuate braking elements for exerting a braking action has a control stage for controlling the braking action on the basis of a braking reference signal. The control stage comprises a model-based predictive control block, in particular of a generalized predictive self-adaptive control type, operating on the basis of a control quantity representing the braking action. The control system further has: a model-identification stage, which determines parameters identifying a transfer function of the electromechanical-braking system; and a regulation stage, which determines an optimal value of endogenous parameters of the control system on the basis of the value of the identifying parameters.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: December 4, 2012
    Assignee: STMicroelectronics S.r.l.
    Inventors: Nicola Cesario, Ferdinando Taglialatela Scafati, Olga Scognamiglio
  • Patent number: 8321979
    Abstract: A toroidal cushion sized to fit and support a posterior of a human user. The toroidal cushion slopes significantly from the back toward the front and comprises an upper cushion surface comprising a depressed center within a surrounding upper cushion surface. The depressed center and the surrounding upper cushion surface are configured such that the user's weight is essentially supported by the surrounding upper cushion surface whereas the depressed center is substantially non-body-weight-bearing and provides an upward force that contacts and supports a rectal area of a user when the toroidal cushion is sat upon.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: December 4, 2012
    Inventor: Robert W. Goodwin
  • Patent number: 8325502
    Abstract: An embodiment of a self-supply circuit, for a voltage converter that converts an input voltage into an output voltage and has a main switch and a controller, designed to control switching of the main switch for controlling the output voltage; the self-supply circuit is provided with: a charge accumulator, which is connected to the controller and supplies a self-supply voltage to the same controller; a generator, which supplies a charge current to the charge accumulator; and an auxiliary switch, which has a first conduction terminal in common with a respective conduction terminal of the main switch and is operable so as to control transfer of the charge current to the charge accumulator. In particular, the self-supply circuit is provided with a precharge stage, connected to the auxiliary switch, which carries out a precharging of an intrinsic capacitance of the auxiliary switch before a turning-off transient of the main switch ends.
    Type: Grant
    Filed: November 26, 2008
    Date of Patent: December 4, 2012
    Assignee: STMicroelectronincs S.r.l.
    Inventors: Salvatore Giombanco, Salvatore Tumminaro
  • Patent number: 8319597
    Abstract: An embodiment of a resistor formed by at least one first portion and one second portion, electrically connected to one another and with different crystalline phases. The first portion has a positive temperature coefficient, and the second portion has a negative temperature coefficient. The first portion has a first resistivity, and the second portion has a second resistivity, and the portions are connected so that the resistor has an overall temperature coefficient that is approximately zero.
    Type: Grant
    Filed: December 15, 2009
    Date of Patent: November 27, 2012
    Assignee: STMicroelectronics S.r.l.
    Inventor: Stefania Maria Serena Privitera
  • Patent number: 8319530
    Abstract: A buffer circuit includes a biasing circuit operable to generate first and second biasing signals. A capacitive network includes an input adapted to receive an input signal and the capacitive network is operable responsive to the input signal to generate first and second bootstrapped signals. A push-pull stage includes first and second control inputs and an output. The push-pull stage is coupled to the biasing circuit to receive the first and second biasing signals on the first and second control inputs, respectively, and is coupled to the capacitive network to receive the first and second bootstrapped signals on the first and second control inputs, respectively. The push-pull stage is operable to generate a buffered output signal on the output responsive to the first and second bootstrapped signals.
    Type: Grant
    Filed: March 20, 2009
    Date of Patent: November 27, 2012
    Assignee: STMicroelectronics R&D (Shanghai) Co. Ltd
    Inventors: Jianhua Zhao, Sarah Gao
  • Patent number: 8319484
    Abstract: A method and system control the adding or dropping of phases in a multiphase voltage regulator. The regulator has an efficiency and this efficiency of the regulator is calculated for a given number of phases being activated from an output voltage, input voltage, output current, and duty cycle of the regulator. The efficiency of the regulator is also calculated if a phase is added using the derivative of the duty cycle as a function of the output current. The efficiency of the regulator is further calculated if a phase is dropped using the derivative of the duty cycle as a function of the output current. From these operations of calculating, a phase is either added, dropped, or the phase is maintained at its current value to thereby optimize the efficiency of the regulator.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: November 27, 2012
    Assignee: Intersil Americas Inc.
    Inventor: Michael Jason Houston
  • Patent number: 8317272
    Abstract: An embodiment of a braking system for a vehicle to control a regenerative braking; the braking system is provided with: a plurality of hydraulically operated mechanical brakes; a hydraulic braking circuit connected to the mechanical brakes; a brake pump to raise pressure in the hydraulic braking circuit; a brake pedal mobile between a resting position and a maximal braking position; a connecting cap, which mechanically connects the brake pedal to the brake pump, and is divided into two reciprocally independent parts; an elastic system which tends to push the brake pedal towards the resting position; a position sensor to read the position of a part of the connecting cap integral to the brake pedal; and a pilot system to pilot an energy recovery system for effecting a regenerative braking and uses the position of the part of the connecting cap integral to the brake pedal provided by the position sensor.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: November 27, 2012
    Assignee: Ferrari S.p.A.
    Inventor: Fabrizio Favaretto
  • Patent number: 8316493
    Abstract: Systems and methods are provided herein that provide for bag cutting and closure.
    Type: Grant
    Filed: November 20, 2009
    Date of Patent: November 27, 2012
    Inventor: Joseph H. Clearman
  • Patent number: 8320401
    Abstract: High-speed transceiver devices, such as GBIC-type transceivers, are accessed and addressed. Identification information (including manufacturer name, model, compliance codes) is placed in data fields of the transceivers. An algorithm checks each port in each module of a host system to determine if a transceiver is present. If a particular transceiver is present, then algorithms store the port address of the transceiver in memory and enable the transceiver to be read from or written to. Reading from the transceiver includes reading the identification information, and writing to the transceiver includes writing the identification information. If a transceiver is initially determined not to be present or if the reading/writing/enabling processes fail, then a recovery process determines if the transceiver was present the last time it was checked. If it was present the last time, then the process continues to try to recover the transceiver data—otherwise, the port is marked as empty.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: November 27, 2012
    Assignee: Foundry Networks, LLC
    Inventor: Patrick Chung-You Liu
  • Patent number: 8316696
    Abstract: A sensor for detecting surface cracks in a component or structure. A preferred embodiment of the device comprises a flat body portion with a central hole through which a main structural bolt passes. The body portion has a throughway providing fluid communication between an exterior port and a substantially hermetically-sealed area on the structural surface being monitored. A crack which develops in the monitored area surrounding the bolt hole will cause venting of the hermetically-sealed area, in turn causing a change in fluid pressure that can be detected and/or measured to warn of the presence of the crack.
    Type: Grant
    Filed: May 4, 2007
    Date of Patent: November 27, 2012
    Assignee: Structural Monitoring Systems Ltd.
    Inventors: Kenneth Davey, Nigel Laxton