Patents Represented by Attorney, Agent or Law Firm Greg J. Michelson
-
Patent number: 6828823Abstract: An integrated circuit includes non-volatile and volatile memory, with the volatile memory controlling the integrated circuit's functionality. Various techniques are disclosed for programming the different types of memory through one or more data ports to provide in-system programmability and dynamic reconfigurability. External configuration devices are not required if the data from the non-volatile memory is transferred directly to the volatile memory.Type: GrantFiled: May 16, 2003Date of Patent: December 7, 2004Assignee: Lattice Semiconductor CorporationInventors: Cyrus Tsui, Benny Ma, Om P. Agrawal, Ju Shen, Sam Tsai, Jack Wong, Chan-Chi Jason Cheng
-
Patent number: 6812869Abstract: An input/output (I/O) circuit bank is disclosed, in accordance with one embodiment, having programmable I/O circuits configurable to support I/O interface standards for single-ended and differential signaling. The associated pads of one or more of the I/O circuits may be utilized to provide an external reference signal via a pass transistor onto an internal bus for use by the remainder of the I/O circuits. The pass transistors may be designed to function as lowpass filters to limit the amount of noise that passes through them.Type: GrantFiled: February 13, 2003Date of Patent: November 2, 2004Assignee: Lattice Semiconductor CorporationInventors: Arifur Rahman, Harold Scholz
-
Patent number: 6812465Abstract: Microbolometer circuitry and methods are disclosed to allow an individual microbolometer or groups of microbolometers, such as a microbolometer focal plane array, to operate over a wide temperature range. Temperature compensation is provided, such as through circuitry and/or calibration methods, to reduce non-uniform behavior over the desired operating temperatures. For example, the relative mismatch in the temperature coefficient of resistance of an active microbolometer and a reference microbolometer is compensated by employing a variable resistor in series with the active microbolometer. The variable resistor can be calibrated over the desired temperature range to minimize the affect of the relative mismatch. Various other circuit implementations, calibration methods, and processing of the microbolometer circuit output can be employed to provide further compensation.Type: GrantFiled: February 27, 2002Date of Patent: November 2, 2004Assignee: Indigo Systems CorporationInventors: William J. Parrish, Jeffrey L. Heath, Naseem Y. Aziz, Joseph Kostrzewa, George H. Poe
-
Patent number: 6809674Abstract: Systems and methods are disclosed to provide threshold detection and successive approximation analog-to-digital conversion. For example, in accordance with an embodiment of the present invention, a circuit is disclosed that provides successive approximation analog-to-digital conversion and high-speed threshold detection operations by utilizing common hardware resources.Type: GrantFiled: October 15, 2003Date of Patent: October 26, 2004Assignee: Lattice Semiconductor CorporationInventor: Edward A. Ramsden
-
Patent number: 6803555Abstract: Two-stage auto-zero amplifier circuits are disclosed, along with methods of auto-zeroing such amplifier circuits. The two-stage auto-zero amplifier circuit may be part of an electronics signal chain coupled to a detector element to process an electronic signal induced by illumination. In an exemplary embodiment, the auto-zero amplifier circuit includes a first stage, which includes a low-noise fixed gain amplifier, capacitively coupled to a second stage, which includes a high gain amplifier. In an exemplary embodiment of a method of auto-zeroing the two-stage auto-zero amplifier circuit, a first terminal of the detector element is decoupled from the auto-zero amplifier circuit, and the first stage of the auto-zero amplifier circuit is locally referenced to a second terminal of the detector element. An auto-zero voltage for the auto-zero amplifier circuit is stored between the first stage of the auto-zero amplifier circuit and the second stage of the auto-zero amplifier circuit.Type: GrantFiled: September 7, 2001Date of Patent: October 12, 2004Assignee: Indigo Systems CorporationInventors: William J. Parrish, Naseem Y. Aziz
-
Patent number: 6791394Abstract: Power supply sequencing systems and methods are disclosed. In one embodiment, a programmable charge pump supplies a programmable current source, which drives an external NFET that controls whether power is supplied to a device or a portion of circuitry. The maximum voltage and the turn-on ramp rate supplied to the NFET are programmable and, therefore, the NFET can be operated safely within its rated limits without requiring external protection devices. If a high-voltage output terminal is not required to drive an external NFET, the output terminal, in accordance with another embodiment, may be configured to function as an open drain logic output terminal.Type: GrantFiled: October 10, 2002Date of Patent: September 14, 2004Assignee: Lattice Semiconductor CorporationInventors: Frederic N. F. Deboes, Ludmil N. Nikolov, Hans W. Klein, Geoffrey R. Richard
-
Patent number: 6788101Abstract: A programmable interface circuit is disclosed, in accordance with one embodiment, which supports differential and single-ended signaling. For example, an input buffer within the programmable interface circuit is configurable to receive differential signals or single-ended signals. A multiplexer provides the appropriate reference signal to the input buffer, when configured to receive single-ended signals, by selecting the reference signal from a plurality of reference buses. The multiplexer, along with a capacitor, may also provide lowpass filtering of the reference signal. Furthermore, an output buffer may be configurable utilizing techniques similar to that described for the input buffer.Type: GrantFiled: February 13, 2003Date of Patent: September 7, 2004Assignee: Lattice Semiconductor CorporationInventor: Arifur Rahman
-
Patent number: 6735706Abstract: A programmable power management integrated circuit includes analog input monitors that receive analog input signals that correspond to voltage, current, or temperature measurements. The analog input monitors apply programmable thresholds to the measurements and output the results to a programmable logic device, which may generate various status and/or control signals to the system being monitored. The programmable logic device controls FET drivers that can switch on and off power to the monitored system. The programmable power management integrated circuit may also comprise an internal oscillator, a serial interface, an in-system programmable interface, a joint test action group interface, a memory that stores identification information, and a register for capturing system information during power-down.Type: GrantFiled: December 6, 2000Date of Patent: May 11, 2004Assignee: Lattice Semiconductor CorporationInventors: Jock F. Tomlinson, David C. Wilkinson, James J. Bennett, Douglas C. Morse
-
Patent number: 6728514Abstract: Wireless broadband data access is provided to and from a plurality of locations distributed randomly over a large geographic area. The network can be deployed one node at a time, with a new node incorporated into the network if within radio frequency range of any existing node in the network. The newly incorporated node can then be the attaching point for another new node that requires incorporation into the network. Data can be forwarded over multiple hops to reach its destination in the network, with the data-polling scheme self-synchronizing with minimal transmission overhead.Type: GrantFiled: December 13, 2000Date of Patent: April 27, 2004Assignee: Wi-Lan Inc.Inventors: Nuno Bandeira, Lars Poulsen
-
Patent number: 6700823Abstract: Systems and methods provide common mode termination for input/output circuits. For example, common mode termination may be provided to a bank of input/output circuits by programmably coupling a bus to each pair of input/output circuits. The bus provides a path to ground for common mode signals through a capacitor or, alternatively, the bus may be designed to provide or assist in providing the necessary capacitance.Type: GrantFiled: October 30, 2002Date of Patent: March 2, 2004Assignee: Lattice Semiconductor CorporationInventors: Arifur Rahman, Harold Scholz
-
Patent number: 6639434Abstract: A low voltage differential signaling driver is disclosed that is capable of supporting many different LVDS standards or signal level requirements. The low voltage differential signaling driver has a programmable offset voltage and a programmable differential output voltage, which may be programmed independently.Type: GrantFiled: October 7, 2002Date of Patent: October 28, 2003Assignee: Lattice Semiconductor CorporationInventor: Arifur Rahman
-
Patent number: 6279051Abstract: A host adapter has receive and transmit data paths, each of which includes a buffer (formed of storage elements) for temporarily holding the data being transferred by the host adapter. The host adapter uses each of the two buffers for storing only the data being transferred in the respective direction, each independent of the other, for full-duplex data transfer therethrough. To permit parallel flow-through operation, each of the two buffers is organized into a number of fixed-sized pages that are accessible via the peripheral bus only one page at a time. To maximize bandwidth and minimize latency, during operation in any given direction of data transfer (e.g. from the computer bus to the peripheral bus or vice versa) the host adapter uses at least two pages in a data path simultaneously: one for receipt and another for transmission.Type: GrantFiled: March 20, 2000Date of Patent: August 21, 2001Assignee: Adaptec, Inc.Inventors: Stillman F. Gates, Salil Suri
-
Patent number: 6196888Abstract: In an outboard motor including a centrifugal clutch system between the engine crankshaft and the drive shaft and including an exhaust pipe that has an outlet which is submerged under water in an operable state of the outboard motor, the exhaust pipe is provided with an exhaust vent which is positioned above water in an operable state of the outboard motor. Thus, when a reverse rotation takes place in the event of unsuccessful engine start, the exhaust vent allows atmospheric air to flow into the exhaust pipe so as to prevent the internal combustion engine from working as a suction pump and introducing water into the engine cylinder through the exhaust pipe.Type: GrantFiled: June 21, 1999Date of Patent: March 6, 2001Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Hiroshi Kawamura, Mitsuharu Tanaka, Takao Aihara
-
Patent number: 6183323Abstract: In an outboard marine drive, the engine is received in an under case, and is closed by both a fan cover and an engine cover so that the engine may be entirely covered by the engine cover jointly with the under case for a favorable aesthetic effect. However, the fan cover covers the engine closely in cooperation with the under case so that a narrow air passage is defined around the engine, and cooling air of high velocity can be continuously passed around the engine. Thus, according to the present invention, no part of the engine is exposed, but the fan cover surrounding the engine defines an appropriate gap around the engine for effectively guiding cooling air around the engine.Type: GrantFiled: September 11, 1998Date of Patent: February 6, 2001Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Mitsuharu Tanaka, Tomonori Ikuma, Hiroshi Mizuguchi