Abstract: An acknowledge-back pager receives an address signal positioned within a group of address signals. Following reception of the address signal, first and second acknowledge signals are transmitted as determined at least in part by the received address signal's position in the group of address signals, such that, the first and second acknowledge signals are not simultaneously transmitted.

Abstract: A paging receiver capable of bit synchronizing to one of two data rates. The receiver has a digital phase locked loop integrated onto a single integrated circuit clocked by a single frequency crystal. The paging receiver receives and synchronizes to a POCSAG signal which may be transmitted at either 512 bits per second or 1200 bits per second. The digital phase locked loop bit synchronizes to either data rate using a single crystal frequency of 76.8 kHz. The data rate is selected by a bit in the code paging receiver's code plug. The digital phase locked loop is constructed to have a substantially constant frequency to bandwidth ratio at both data rates.

Abstract: A paging receiver receiving message information having one of a plurality of (BCH) code word structures has a programmable error correcting apparatus for correcting bit errors within the message information. The programmable error correcting apparatus may be configured in response to identifying a signalling system and the code word structure corresponding to ther signalling system, or in response to changes in the code word structure within the message. A simplified error correcting apparatus may correct a single bit error within a code word structure. The programamble error correcting apparatus is capable of correcting any two bit error combination within the code word structure and contains sequential and combinational logic circuits. The programmable error correcting apparatus is integrated together with a microprocessor on a monolithic integrated circuit.

Abstract: A method is described for transmitting a plurality of messages within a single transmission having one address to a selective call receiver. An identification packet preceding each message determines the slot in which the message is stored. The packet may also move a message from one slot to another.