Abstract: A printer table including a series of angled jets for sources of air and for sources of vacuum and also including a set of locating pins. The combination enables the use of the directed jets to move a substrate into position for processing and to hold the substrate in position once located by the locating pins with the use of a vacuum. Because the substrates are very thin and the locating pins are very short, the combined use of the vacuum and directing jets effectively permit the substrate to float on air in close proximity to the table surface while not overriding the locating pins.

Abstract: A circuit divides pulse code modulation (PCM) samples in D2 format. An exponent subtractor provides the difference of the exponents of the two numbers. A mantissa multiplier circuit determines the quotient by multiplying the mantissa of the PCM sample by an inverted divider. A sign generator provides a sign value for the resultant quotient of the two numbers. A normalizer circuit ensures that the quotient mantissa has a predetermined range of values.

Abstract: A Multiplexer/Demultiplexer for transmitting packetized data between a processor and a Pulse Code Modulation (PCM) bus. First-in First-Out (FIFO) shift registers, serial-to-parallel and parallel-to-serial converters and associated timing and control circuits are utilized to perform the packetized data transmission.

Abstract: An address generator which provides addresses for machine storage and software retrieval of computer status information. A counter is used to generate address signals in a descending order until it is disabled by a computer during alarm conditions. Under such conditions the counter provides a bias address for referencing the most recent status word. A gating circuit gates computer generated address signals to an adder circuit during the alarm conditions. The adder circuit adds the computer generated address signals to the counter generated bias signal to provide address signals which reference physical storage locations in a memory.

Abstract: A dynamic RAM refresh circuit provides the interface for timely refresh of up to 64K of RAM memory while simultaneously providing for minimal disruption of a CPU's access of that RAM memory. Circuitry is also provided to permit interlock control for timeshared access of the RAM memory on a shared basis with the refresh circuit.

Abstract: A semiconductor encapsulating apparatus including a positioning apparatus positioning an encapsulant premold (preformed piece or pellet) in contact with the semiconductor and the curing apparatus through which the semiconductor and encapsulant are passed to cure and thereby encapsulate the semiconductor. The encapsulating apparatus may include a vacuum chamber to degass the encapsulant prior to curing, a robotic arm to position an encapsulant premold in contact with the semiconductor and encapsulant premold forming apparatus including a die engaging a plastically deformable strip to form therein a mold. Also included may be a mold filling dispenser, a mold solidifying bath which may include liquid nitrogen, a solidified premold ejecting roller and a premold storage tray. Also disclosed are roller and spray coating apparatuses adapted to coat an inner surface of the mold with a release agent thereby to promote subsequent premold release.

Abstract: A circuit multiplies pulse code modulation (PCM) samples in D2 format. An exponent adder provides the sum of the exponents of the two numbers. A mantissa multiplier circuit determines the product of the two mantissas and a sign generator provides a sign value for the resultant product of the two numbers. A normalizer circuit ensures that the product mantissa has a predetermined range of values.

Abstract: A circuit multiplies or divides pulse code modulation (PCM) samples in D2 format. An exponent adder/subtractor provides the sum/difference of the exponents of the two numbers. A mantissa multiplier/divider circuit determines the product/quotient of the two mantissas and a sign generator provides a sign value for the resultant product/quotient of the two numbers. A normalizer circuit ensures that the product/quotient mantissa has a predetermined range of values.

Abstract: A synchronizing circuit that synchronizes the non-maskable interrupt (NMI) input signals of two separate microprocessor subsystems that are running synchronously as part of a fault tolerant computer system. This circuit enables both microprocessors to detect and respond to an error condition at an identical point in their relative bus timing sequence even though there may be a real time skew between the bus timing of these two subsystems. Storage and gating circuitry are used to provide the precise timing signals required for such synchronization.

Abstract: A synchronizing circuit synchronizes the asynchronous ready signals for two separate microprocessor subsystems that are running synchronously as part of a fault tolerant computer system. Duplicated synchronization circuits, confined in a master-slave arrangement, are utilized with the duplicate microprocessors. Storage and gating circuitry are used to provide the precise timing signals required for such synchronization.

Abstract: A circuit adds and subtracts pulse code modulation (PCM) samples in D2 format. An exponent subtractor determines the difference between exponents of the two PCM samples. A mantissa shifter circuit shifts the mantissa portion of a selected PCM sample to compensate for the difference in the exponents. A mantissa adder circuit adds or subtracts the mantissa portion of the shifted and unshifted PCM samples and a sign generator provides a sign value representative of the resultant added or subtracted PCM samples. A normalizer circuit ensures that the mantissa has a predetermined range of values.

Abstract: A method of adjusting and testing for proper operation a current sensor by applying a threshold current value to the current sensor and adjusting the current sensor to a point just past the threshold of operation. Proper operation of the current sensor is tested by applying a non-operate current value followed by an operate current value to the sensor and checking for respective non-operate and operate output signals from the sensor. Messages, pass/fail indication, and audio signals are provided to signal test results to an operator.

Abstract: An apparatus for testing current sensors employing an electromagnetic coil and one or more Hall Effect switches including a microprocessor controlling a constant current source and visual and audio indicating circuits. A parameter input circuit is provided to permit an operator to select device types and to select test only, or adjustment and test sequences to be executed. The constant current source is adapted to apply a threshold, must-not-operate, and a must-operate current values to the electromagnetic coil. The visual and audio indicating circuits are adapted to provide messages, pass/fail indications, and audio signals signaling test success or failure results to an operator.

Abstract: Cable brackets are formed out of wire and have flat areas swaged into them to provide suitable mounting surfaces. The wire is of sufficient diameter to provide structural rigidity to the bracket and the flattened areas are of such dimension to provide an area sufficiently large enough for a mounting hole.

Abstract: An integrated circuit which facilitates measurement of various integrated circuit packaging parameters, including atmospheric moisture content, impurity content, water vapor transmission rate of encapsulant, corrosion of metallization, temperature, thermal impedance, and strain sensing. This circuit can be interconnected via both wire bonding and mass bonding, and it functions as a test vehicle for the tape automated bonding process. This circuit includes a plurality of subcircuits arranged in a square array such that the test capabilities of both the complete circuit and each individual subcircuit is identical.

Abstract: A three-port conference circuit for use in a pulse code modulated communication system including a first speaker register including an input connected to a telephone system information memory output and including an output, a second speaker register including an input connected to the telephone system information memory output and including an output and a conference adder connected to the first and second speaker register outputs via inputs and including an output connected to a sample inverting circuit of the telephone system. The conference adder adds talking samples by means of an included eight-bit floating point adder.

Abstract: A filter adapter for a connector plug mounted to an inner surface on electromagnetic interference shielding enclosure wall and including a plurality of connector pins. The adapter may be inserted between the connector plug and the enclosure wall to engage each of the connector pins passing therethrough and establish an electrical connection between the pin and the enclosure wall through an electromagnetic interference reducing capacitor, this without the necessity of introducing additional electrical contact points in the conductors as they pass through the enclosure wall.

Abstract: An output circuit for diode-or connected positive three terminal voltage regulators. A voltage divider develops a voltage signal representative of the output voltage from the positive three terminal regulator. An adjustable precision shunt regulator connected to the voltage divider provides a control signal representative of the variance of the voltage signal from a predetermined threshold signal. The positive three terminal voltage regulator provides a variable output voltage in response to and representative of the control signal.