Abstract: A time domain data converter with output frequency domain conversion. A data conversion circuit is operable to receive a signal in the time domain and provide an output in the frequency domain. It includes a data converter for converting data from an analog format to a digital format in the time domain. It also includes a processor for processing the data in the digital format output from the data converter through a time domain/frequency domain transform to provide data in the digital format in the frequency domain. The output of the frequency domain operation or the time domain operation can be provided for output in response to the generation of a data ready signal.

Abstract: An on-line optimizer is comprised of a nonlinear dynamic model (702) which is operable to provide an estimation of the output of a plant. This receives manipulated variables (MV), disturbance variables (DV), and computed disturbance variables (CDB). The estimated output of the model is then compared to the actual output measured by virtual on-line analyzer (VOA) (616). This is compared is a difference block 618 to generate a bias which is then filtered by a filter(620). The output thereof is then provided to an output block (672) in a steady state optimizer (700) to offset the desired setpoints. These set points are input to a steady state nonlinear model which is operable to optimize the inputs to the plants for use for writing new set points in accordance with a predetermined cost function. This cost function is utilized to optimize the new inputs with the use of the steady state model in accordance with various constraints and target values.

Abstract: A multi-bit DAC (109) is provided as part of a digital-to-analog data converter (DAC). The multi-bit DAC is comprised of a plurality of single-bit DACs (503) which have the values thereof selected through a digital encoder (505). The digital encoder (505) performs dynamic element matching (DEM) on an input data value. The sequence of selection is performed such that the element mismatch noise response of the DAC (109) is shaped. The outputs are summed at a summing junction (507) and then filtered with a low pass filter (113). In the noise shaping response, a cyclical second order response is provided with a Data Weighted Averaging (DWA) technique wherein the outputs of the DACs are restricted to one of two states. To achieve this, select ones of the output values are changed in order to comply with this restriction, thus deviating from a uniform element selection algorithm. This provides a constrained second order response which accounts for mismatching of the DAC elements (503).

Abstract: A reconfigurable processor includes at least three (3) MacroSequencers (10)-(16) which are configured in an array. Each of the MacroSequencers is operable to receive on a separate one of four buses (18) an input from the other three MacroSequencers and from itself in a feedback manner. In addition, a control bus (20) is operable to provide control signals to all of the MacroSequencers for the purpose of controlling the instruction sequence associated therewith and also for inputting instructions thereto. Each of the MacroSequencers includes a plurality of executable units having inputs and outputs and each for providing an associated execution algorithm. The outputs of the execution units are input to an output selector which selects the outputs for outputs on at least one external output and on at least one feedback path. An input selector (66) is provided having an input for receiving at least one external output and at least the feedback path.

Abstract: There is disclosed a method and apparatus for an object locator system (10) for requesting and obtaining information about the location of a mobile object, having attached thereon a lightweight object locator (42), operable in a region served by a two-way paging system (12) and a global positioning satellite system (50). The object locator (42) may be selectively activated to conserve power or enabled to respond only when beyond or within a boundary. Further, the object locator system (10) may provide the location information in several forms including rectangular or polar coordinates referred to a base station (18) or origin, position on a map display, etc.

Abstract: An apparatus and method is disclosed for retaining parameter information generated or received in an electronic circuit breaker (10). The electronic circuit breaker (10) includes a controller and is connected in a branch circuit coupled to a power source via a power line and powered by the power source. Upon occurence of a power fault, a control signal responsive to the power fault is generated and coupled to a control input of the circuit breaker. The control signal causes retention of parameter information generated or received in the electronic circuit breaker (10). Means for retaining the data representing parameter information include charging a storage capacitor to a predetermined value corresponding to the parameter information being retained, writing the parameter information being retained to an EEPROM and writing the data containing the parameter information being retained into a Static RAM.

Abstract: A method for providing color correction to a color marking engine for halftone and contone images includes the step of first generating a test pattern. This test pattern has a plurality of discrete images disposed thereon with the discrete images having characteristics that are correlated with parameters of the print job. In one mode, they relate to halftone images that have differing densities of dots, each less than 100% density. The images are correlated to different bit values for the same densities such that the maximum density value for the pixel is offset for different images. A user then views the different images and determine which one is closest to a true gray and then selects the offset bit value for that image as the marking engine offset. This can then be applied to that particular marking engine. This can be utilized for a plurality of marking engines (651) with a single RIP (650).

Abstract: A load center monitor (10) is disclosed for monitoring and analyzing data gathered by electronic circuit breakers (40) in a power distribution system and communicated to the load center monitor (10) via a network (26) coupling the load center monitor (10) and the circuit breakers (40) together. The load center monitor (10) includes a first communication port (24) for communicating with the circuit breakers (40), a second communication port (20 or 22) for communicating with an external device and third communication port (28) for providing diagnostic information. The load center monitor (10) further includes audible (30) and visible (34) annunciators for providing alarm or status indications. A processor (76), coupled to the communication ports and to a memory (70) having a real-time clock for time stamping data provides monitoring, control, analysis and data generating capability in the load center monitor (10).

Abstract: A system including a load center monitor (10) connected to a plurality of digitally enhanced circuit breakers (40) by a communication bus (26) forms a network of reconfigurable circuit breakers which provides advanced monitoring and control of an electrical power distribution system. A user port (20) and a service port (22) provide a communication interface with an external computer. Visual indicators (34) and an audible alarm (30) provide for alerting persons to certain conditions in the system. Buttons are provided for CLEAR (38), RESET (36), and TEST functions, and a diagnostic port (24) is also provided. The load center monitor (10) is operable to monitor the operation of the circuit breakers (40) and download information therefrom for storage in the load center monitor (10) as in the form of historical data.

Abstract: A power supply provides a regulated power factor load to a primary power source, and thus low input current distortion, by monitoring: (A) The input voltage; (B) The power source current, not at the input to the power supply, but rather at a point downstream of an EMI filter and a shunt capacitance in the power supply; and (C) The output DC voltage. The power supply uses these inputs to control the power switching transistors to regulate the phase and amplitude of the monitored current. The phase of the monitored current is controlled primarily by the phase of the input voltage. A differentiating circuit in the feedback loop of the power supply control circuitry causes the monitored current to lag the input voltage by an amount equal to the lead induced in the phase of the input current by the EMI filter and shunt capacitor so that the actual input current to the power supply is in phase with the input voltage.

Abstract: There is disclosed an object locator system (10) for requesting and obtaining information about the location of an individual animal or moveable object, having a lightweight, attached object locator (42), that is present in a region served by a two-way paging system (12) and a global positioning satellite system (50). The object locator (42) may be selectively activated to conserve power or enabled to respond only when beyond or within a boundary. Further, the object locator system (10) may provide the location information in several forms including rectangular or polar coordinates referred to a base station (18) or origin, position on a map display, etc.

Abstract: A method of communicating data with a plurality of electronic circuit breakers operatively connected in a power distribution system is disclosed and claimed herein. Each circuit breaker includes a communication port coupled to a network. The method comprises coupling a communication terminal, having a processing circuit and a first communication port coupled to the processing circuit, to the network via the first communication port; operating a first communication protocol for automatically addressing individual ones of the circuit breakers and for controlling message traffic on the network; and transmitting and receiving data on the network under control of the first communication protocol relating to the monitoring and control of the individually addressable ones of the plurality of electronic circuit breakers coupled to the network.

Abstract: A head mounted surround sound virtual positioning system that includes a video recorder (200), which is operable to have disposed therein a tape (202), having a surround sound audio track associated therewith. The surround sound system is encoded on two channels, which are output to a Dolby.RTM. decoder (204), which is operable to extract the five surround sound system channels therefrom. The left front, left rear, right front and right rear channels are input to a virtual positioning system (264), which is operable to virtually position each of the speakers relative to the head of the listener (26). These signals are then combined with a combining circuit (268) to provide the virtual positioning of only two speaker lines (58) and (60), disposed adjacent the right and left ears of the listener (26). The speakers (58) and (60) are disposed on the head mounted system such that they are fixed relative to, the ear of the listener and slightly forward of the ears and adjacent the head.

Abstract: A shelf having self-adjusting mounting rails and a drawer which is slidably mounted to the shelf are provided for a server system rack. The mounting rails of the shelf are telescopically adjustable to vary the lengths of the mounting rails for accommodating racks having varying horizontal depths. Opposite ends of the mounting rails are rigidly fastened to the rack to fix the lengths of the mounting rails to fit the horizontal depth of the rack. The shelf further includes an enclosure which is fastened to the mounting rails. Telescoping, bearing slide assemblies are mounted to respective ones of opposite, interior sides of the enclosure and to opposite exterior sides of the drawer to slidably secure the drawer to the shelf for moving between an inward position, disposed substantially within the shelf, and an outward position, extending exteriorly of the shelf. A flexible cable arm is secured to the rear of the drawer and the rear of the shelf for securing cables which pass between the drawer and the enclosure.

Abstract: A processor support bracket is provided for mounting a processor cartridge package to a surface of a system baseboard of a personal computer. The processor support bracket includes a mounting section which is mounted to the baseboard to secure the cartridge package to the system baseboard. An end of the mounting section which is disposed adjacent to the surface of the baseboard has two spaced apart apertures which extend therethrough, transverse to the surface of the baseboard. Two slots are formed into the end of said mounting section and extend transverse to the apertures. The slots intersect the respective ones of the apertures and have widths for passing fasteners through the slots and into respective ones of the apertures for securing the mounting section to the system baseboard.

Abstract: A battery charging system is provided which is comprised of a battery pack (30) and a charging system (20). The battery pack (30) includes a battery (10) and a battery capacity detect circuit (32). The battery capacity detect circuit (32) is interfaced with the charging system (20) through a single line to output a CHG-Bar signal. The battery capacity detect circuit (32) is operable to perform numerous monitoring operations on the battery by detecting the charge input to the battery and detecting charge taken away from the battery in a discharge operation. This operation is performed independent of the charging operation by the charging system (20). However, the charging operation of the charger (22) can be affected with the CHG-Bar signal.

Abstract: An animal litter comprised of a liquid absorbent aggregate impregnated with a litmus agent for indicating a urinary tract infection in cats.

Abstract: A PSD template for an HDSL2 transmission system includes three regions, a full-duplex region for both upstream and downstream transmission, and two half-duplex regions, a first duplex region for containing substantially upstream power and a half-duplex region for containing substantially downstream power.

Abstract: A method for controlling a computer by inputting an analog signal into the computer to control a web browser software application. The analog signal contains a trigger signal which activates proprietary software, and a product identifier. The proprietary software launches the web browser application on the computer, extracts the product identifier, and creates an appended data string by appending server address (URL) routing information to the product identifier information. The appended data string is automatically inserted into the web browser as keystroke data and routed to an advertiser reference server. The appended routing information directs communication to the advertiser reference server which contains a cross-referenced database of advertiser product identifier information and associated advertiser server URLs.

Abstract: A distributed digital switching system is provided that includes a plurality of service controllers (20) which are interconnected to each other through a network (10). A network arbitrator is provided that controls the flow of traffic on the network (10). Each of the service controllers (20) is operable to provide a switching configuration between inbound data to the service controller (20) and network terminations associated with each of the service controllers (20). A processor (150) on each of the service controllers (20) controls the operations thereof with the voice information stored in a memory (208) which can be configured with a circuit (204). Each of the service controllers (20) has associated therewith a conference circuit for defining and creating a conference that can access all inbound data and provide interconnections therebetween and output this on a single outbound conference channel. There can be multiple conferences created at each service controller (20).